Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.

Abstract: An antenna structure includes a first substrate and a second substrate. The first substrate includes: a semiconductor chip configured to transmit or receive a first radio-frequency (RF) signal; a first ground layer configured to provide ground to the semiconductor chip; and a signal layer arranged on a side of the first substrate opposite to the semiconductor chip and configured to transmit the first RF signal. The second substrate has an antenna array formed of antenna cells, each of the antenna cells including: a first antenna layer configured to radiate second RF signals based on the first RF signal; a second ground layer configured to provide ground to the first antenna layer. The antenna device further includes a plurality of connectors electrically coupling the semiconductor chip to the antenna array.

Abstract: A method for controlling mask fabrication is provided, wherein the method uses statistical process control analysis. A manufacturing model is defined. A process run of a mask is performed as defined by the manufacturing model. A fault detection analysis is performed to reduce a bias in the manufacturing model. A fine-tuning signal is generated in response to a result of the fault detection analysis. The process run operation is adjusted according to the fine-tuning signal.

Abstract: A mask fabrication system. The mask fabrication system contains a processing tool, a metrology tool, and a controller. The processing tool processes a mask. The metrology tool inspects the mask to obtain an inspection result. The controller generates a manufacturing model of the processing tool and calibrates the manufacturing model according to a device data, a material data, and the inspection result of the mask.

Abstract: A mask fabrication system. The mask fabrication system contains a processing tool, a metrology tool, and a controller. The processing tool processes a mask. The metrology tool inspects the mask to obtain an inspection result. The controller generates a manufacturing model of the processing tool and calibrates the manufacturing model according to a device data, a material data, and the inspection result of the mask.

Abstract: A mask fabrication system. The mask fabrication system contains a processing tool, a metrology tool, and a controller. The processing tool processes a mask. The metrology tool inspects the mask to obtain an inspection result. The controller generates a manufacturing model of the processing tool and calibrates the manufacturing model according to a device data, a material data, and the inspection result of the mask.

Abstract: An interlock system prevents collision of handling equipment and damage to wafers in an automated wafer transport apparatus during manual control by an operator. Sensors are used to sense when wafer transport arms and wafer stage are both in their home positions. A controller is responsive to the sensors for operating the lockout system such that attempted activation of the transport arm by the operator is locked out unless both the stage and the arms are in their home positions. The lockout system preferably comprises normally closed electrical relays.

Abstract: The present invention discloses an allocation method for establishing a theoretical dispatching model for dynamically allocating the bottleneck resource according to the on-line current data. At first, the on-line current data are obtained from the bottleneck resource and those tools next to the bottleneck resource. Decision parameters such as the remaining processing time, buffer WIP of the tools next to bottleneck resource are sequentially derived by using the current data. Each tool next to the bottleneck resource is then determined to receive additional lots from the bottleneck resource or not. Finally, the bottleneck resource is reallocated to those tools that requires the lots from the bottleneck resource.