Patents by Inventor Wen-Yen Huang

Wen-Yen Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9844780
    Abstract: Provided is an allergen detecting apparatus that can combine with an allergen microarray chip, and the apparatus comprises a microfluidic chip and a clamping unit. The allergen microarray chip can be any commercial chip and a reaction region of the microfluidic chip is configured to fit tightly with a microarray region of the allergen microarray chip allowing a sample or a reagent to contact with a protein allergen disposed on the microarray region. The present invention also provides a platform comprising a control system configured to automatically perform the mixing/binding reactions of the antibody/antigen in the apparatus of the present invention to achieve a faster, more cost-effective, and accurate detection of allergens.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: December 19, 2017
    Assignee: National Tsing Hua University
    Inventors: Gwo-Bin Lee, Wen-Yen Huang
  • Publication number: 20170014820
    Abstract: Provided is an allergen detecting apparatus that can combine with an allergen microarray chip, and the apparatus comprises a microfluidic chip and a clamping unit. The allergen microarray chip can be any commercial chip and a reaction region of the microfluidic chip is configured to fit tightly with a microarray region of the allergen microarray chip allowing a sample or a reagent to contact with a protein allergen disposed on the microarray region. The present invention also provides a platform comprising a control system configured to automatically perform the mixing/binding reactions of the antibody/antigen in the apparatus of the present invention to achieve a faster, more cost-effective, and accurate detection of allergens.
    Type: Application
    Filed: March 7, 2016
    Publication date: January 19, 2017
    Inventors: Gwo-Bin Lee, Wen-Yen Huang
  • Publication number: 20150342778
    Abstract: This invention provides devices and systems and methods therefrom for properly controlling negative pressure applied to oral cavity, facilitating breathing and treating sleep apnea and snoring. The systems comprise a negative pressure system providing a vacuum source and an oral device comprising a shield, a tube passing through the shield, a flexible negative pressure deliverable part connected to the shield or the tube, an optional tongue protector, where the negative pressure deliverable part is conformable to the contour of the upper palate. Negative pressure is delivered to the front and back zones inside the oral cavity via the negative pressure deliverable part to eliminate air space in the oral cavity.
    Type: Application
    Filed: January 10, 2014
    Publication date: December 3, 2015
    Inventors: Chung-Chu Chen, Yin-Ruei Chen, Ming-jian You, Wen-Yen Huang
  • Publication number: 20140190489
    Abstract: This invention provides devices and systems and methods therefrom for properly controlling negative pressure applied to oral cavity, facilitating breathing and treating sleep apnea and snoring. The systems comprise a negative pressure system providing a vacuum source and an oral device comprising a shield, a tube passing through the shield, a flexible negative pressure deliverable part connected to the shield or the tube, an optional tongue protector, where the negative pressure deliverable part is conformable to the contour of the upper palate. Negative pressure is delivered to the front and back zones inside the oral cavity via the negative pressure deliverable part to eliminate air space in the oral cavity.
    Type: Application
    Filed: January 13, 2014
    Publication date: July 10, 2014
    Applicant: Somnics, Inc.
    Inventors: Chung-Chu Chen, Yin-Ruei Chen, Ming-Jian You, Wen-Yen Huang
  • Patent number: 8398289
    Abstract: A structure for eliminating bright lines of a tiled backlight module is provided. The structure includes a light guide plate, and a plurality of light sources. The light guide plate includes a plurality of rows of optical elements. The rows of optical elements extend in parallel. The light sources are provided at least one side of the light guide plate for projecting a light into the light guide plate and generating a regular but non-uniform light outputting performance of the light guide plate. Therefore, a brightness of areas where the optical elements are located is higher than the rest areas, so that the light guide plate achieves a regular but non-uniform light emitting performance. Accordingly, the bright lines occurred at joints between two light guide plates are enshrouded by the high brightness areas, and become hard to identify or even undistinguishable, thus “eliminated”.
    Type: Grant
    Filed: October 19, 2009
    Date of Patent: March 19, 2013
    Assignee: Global Lighting Technologies (Taiwan) Inc.
    Inventors: Sheng-Ju Chung, Tung-Chuan Su, Yu-Jeng Lin, Wen-Yen Huang, Yi-Chieh Lu
  • Patent number: 8390991
    Abstract: A stacked solid state solid electrolytic capacitor includes a plurality of capacitor units, a substrate unit and a package unit. The substrate unit includes a positive guiding substrate and a negative guiding substrate. The positive guiding substrate has a positive exposed end integrally extended therefrom along a first predetermined direction. The negative guiding substrate has a first negative exposed end integrally extended therefrom along a second predetermined direction, a second negative exposed end integrally extended therefrom along a third predetermined direction, and a third negative exposed end integrally extended therefrom along a fourth predetermined direction. The first, the second, the third and the fourth predetermined directions are different. The capacitor units are stacked on top of one another and disposed on the negative guiding substrate. The package unit encloses the capacitor units, one part of the positive and one part of the negative guiding substrate.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: March 5, 2013
    Assignee: Apaq Technology Co., Ltd.
    Inventors: Chi-Hao Chiu, Yui-Shin Fran, Ching-Feng Lin, Chun-Chia Huang, Chun-Hung Lin, Wen-Yen Huang
  • Patent number: 8373972
    Abstract: A solid electrolytic capacitor with a protective structure, which includes stacked capacitor elements electrically connected to the positive and negative terminal. A packaging material such as synthetic resin is used to encapsulate the capacitor elements, the positive terminal, and the negative terminal. Before packaging, a protective layer is formed by a colloid material, which covers the main body of the capacitor that includes the capacitor elements, the positive terminal, and the negative terminal. The protective layer provides a better seal and relieves the external pressure exerting on the capacitor during the packaging process. The protection prevents structural damage to the capacitor's main body while reducing the risk of short-circuits and excessive current leakage.
    Type: Grant
    Filed: October 20, 2010
    Date of Patent: February 12, 2013
    Assignee: Apaq Technology Co., Ltd.
    Inventors: Ching-Feng Lin, Chi-Hao Chiu, Wen-Yen Huang, Chun-Chia Huang
  • Patent number: 8305735
    Abstract: A stacked solid electrolytic capacitor with positive multi-pin structure includes a plurality of capacitor units, a substrate unit and a package unit. The positive electrode of each capacitor unit has a positive pin extended outwards therefrom. The positive pins are divided into a plurality of positive pin units that are separated from each other and electrically stacked onto each other. The negative electrode of each capacitor unit has a negative pin extended outwards therefrom. The negative pins are divided into a plurality of negative pin units. The negative pin units are separated from each other and the negative pins of each negative pin unit are electrically stacked onto each other. The substrate unit has a positive guiding substrate electrically connected to the positive pins and a negative guiding substrate electrically connected to the negative pins. The package unit covers the capacitor units and one part of the substrate unit.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: November 6, 2012
    Assignee: Apaq Technology Co., Ltd.
    Inventors: Yui-Shin Fran, Ching-Feng Lin, Chi-Hao Chiu, Chun-Chia Huang, Wen-Yen Huang
  • Patent number: 8300145
    Abstract: A frame rate up-conversion apparatus comprises a motion vector detecting circuit, a dynamic quality control circuit, a motion compensation circuit and a pull-down recovery circuit. According to quality of motion vectors, a corresponding image output mode is determined dynamically. A visual impact due to incorrect motion vectors is reduced and the visual experience is also improved.
    Type: Grant
    Filed: March 15, 2010
    Date of Patent: October 30, 2012
    Assignee: Silicon Integrated Systems Corp.
    Inventors: Hung Wei Wu, Chih-Yu Chang, Wen-Yen Huang
  • Publication number: 20120099247
    Abstract: A solid electrolytic capacitor with a protective structure, which includes stacked capacitor elements electrically connected to the positive and negative terminal. A packaging material such as synthetic resin is used to encapsulate the capacitor elements, the positive terminal, and the negative terminal. Before packaging, a protective layer is formed by a colloid material, which covers the main body of the capacitor that includes the capacitor elements, the positive terminal, and the negative terminal. The protective layer provides a better seal and relieves the external pressure exerting on the capacitor during the packaging process. The protection prevents structural damage to the capacitor's main body while reducing the risk of short-circuits and excessive current leakage.
    Type: Application
    Filed: October 20, 2010
    Publication date: April 26, 2012
    Applicant: APAQ TECHNOLOGY CO., LTD.
    Inventors: CHING-FENG LIN, CHI-HAO CHIU, WEN-YEN HUANG, CHUN-CHIA HUANG
  • Publication number: 20110216475
    Abstract: A stacked solid-state electrolytic capacitor with multi-directional product lead frame structure includes a plurality of capacitor units, a substrate unit and a package unit. The capacitor units are stacked onto each other. Each capacitor unit has a positive electrode and a negative electrode, the positive electrode of each capacitor unit has a positive pin extended outwards, the positive pins are electrically stacked onto each other, and the negative electrodes are electrically stacked onto each other. The substrate unit has at least one positive guiding substrate electrically connected to the positive pins of the capacitor units and a plurality of negative guiding substrates electrically connected to the negative electrodes of the capacitor units. The package unit covers the capacitor units and one part of the substrate unit in order to expose an end of the at least one positive guiding substrate and an end of each negative guiding substrate.
    Type: Application
    Filed: July 9, 2010
    Publication date: September 8, 2011
    Applicant: APAQ TECHNOLOGY CO., LTD.
    Inventors: Chi-Hao Chiu, Yui-Shin Fran, Ching-Feng Lin, Chun-Chia Huang, Chun-Hung Lin, Wen-Yen Huang
  • Publication number: 20110135001
    Abstract: A hierarchical motion estimation method implemented in a plurality of levels is disclosed. The hierarchical motion estimation method is used for estimating motion vectors of a frame. The frame being partitioned into blocks at a first level, and each block of the first level is partitioned into a plurality of blocks at a second level. The method includes selecting reference blocks at the first level for a specific block at the second level and determining a search range for the specific block at the second level by referring to motion vectors, which are known, of the reference blocks at the first level. By using such a method, the motion vectors of a frame can be rapidly and accurately estimated.
    Type: Application
    Filed: December 7, 2009
    Publication date: June 9, 2011
    Applicant: Silicon Integrated Systems Corp.
    Inventors: Shao-Sheng Yang, Wen-Yen Huang, Chih-Yu Chang
  • Publication number: 20110075027
    Abstract: A frame rate up-conversion apparatus comprises a motion vector detecting circuit, a dynamic quality control circuit, a motion compensation circuit and a pull-down recovery circuit. According to quality of motion vectors, a corresponding image output mode is determined dynamically. A visual impact due to incorrect motion vectors is reduced and the visual experience is also improved.
    Type: Application
    Filed: March 15, 2010
    Publication date: March 31, 2011
    Inventors: Hung Wei WU, Chih-Yu CHANG, Wen-Yen HUANG
  • Publication number: 20110007451
    Abstract: A stacked solid electrolytic capacitor with positive multi-pin structure includes a plurality of capacitor units, a substrate unit and a package unit. The positive electrode of each capacitor unit has a positive pin extended outwards therefrom. The positive pins are divided into a plurality of positive pin units that are separated from each other and electrically stacked onto each other. The negative electrode of each capacitor unit has a negative pin extended outwards therefrom. The negative pins are divided into a plurality of negative pin units. The negative pin units are separated from each other and the negative pins of each negative pin unit are electrically stacked onto each other. The substrate unit has a positive guiding substrate electrically connected to the positive pins and a negative guiding substrate electrically connected to the negative pins. The package unit covers the capacitor units and one part of the substrate unit.
    Type: Application
    Filed: November 30, 2009
    Publication date: January 13, 2011
    Applicant: APAQ TECHNOLOGY CO., LTD.
    Inventors: Yui-Shin Fran, Ching-Feng Lin, Chi-Hao Chiu, Chun-Chia Huang, Wen-Yen Huang
  • Publication number: 20100142219
    Abstract: A structure for eliminating bright lines of a tiled backlight module is provided. The structure includes a light guide plate, and a plurality of light sources. The light guide plate includes a plurality of rows of optical elements. The rows of optical elements extend in parallel. The light sources are provided at least one side of the light guide plate for projecting a light into the light guide plate and generating a regular but non-uniform light outputting performance of the light guide plate. Therefore, a brightness of areas where the optical elements are located is higher than the rest areas, so that the light guide plate achieves a regular but non-uniform light emitting performance. Accordingly, the bright lines occurred at joints between two light guide plates are enshrouded by the high brightness areas, and become hard to identify or even undistinguishable, thus “eliminated”.
    Type: Application
    Filed: October 19, 2009
    Publication date: June 10, 2010
    Inventors: Sheng-Ju Chung, Tung-Chuan Su, Yu-Jeng Lin, Wen-Yen Huang, Yi-Chieh Lu
  • Patent number: 7507353
    Abstract: A phosphor can be excited by light emitting diode (LED) to emit a red light. The phosphor has high emission efficiency. Owing to a sensitizer is used in the phosphor, the phosphor can be excited at the wavelength of 380˜400 nm. Moreover, the excitation efficiency of the wavelength shorter than 370 nm can be increased. The phosphor has a chemical formula of A1-x-y-zBixByCzMoO4.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: March 24, 2009
    Assignee: National Central University
    Inventors: Wen-Yen Huang, Ru-Si Liu, Jenq-Yang Chang
  • Publication number: 20070114495
    Abstract: A phosphor can be excited by light emitting diode (LED) to emit a red light. The phosphor has high emission efficiency. Owing to a sensitizer is used in the phosphor, the phosphor can be excited at the wavelength of 380˜400 nm. Moreover, the excitation efficiency of the wavelength shorter than 370 nm can be increased.
    Type: Application
    Filed: June 8, 2006
    Publication date: May 24, 2007
    Applicant: National Central University
    Inventors: Wen-Yen Huang, Ru-Si Liu, Jeng-Yang Chang
  • Publication number: 20040225832
    Abstract: A portable USB storage device is provided. The USB storage device has a USB connector having power and data pins. A USB controller is connected to the data pins and a DRAM unit for controlling data access of the DRAM unit. A refreshing circuit is coupled to the power pins. The refreshing circuit is operative to refresh the DRAM unit when the USB connector is inserted into a socket of a host. A rechargeable battery is charged via the power pins when the USB connector is inserted into the socket of the host. The rechargeable battery is operative to supply power to the DRAM unit and the USB controller. In response to disconnecting the USB connector from the host, the DRAM unit is switched to a self-refreshing mode by the USB controller and the USB controller enters into a power saving mode.
    Type: Application
    Filed: October 7, 2003
    Publication date: November 11, 2004
    Applicant: Sunplus Technology Co., Ltd.
    Inventor: Wen Yen Huang