Patents by Inventor Wen Yu Lee
Wen Yu Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12229590Abstract: A content channel generation device comprises a resource unit assignment circuit, for assigning scheduled station(s) as node(s) of a full binary tree according to a search algorithm; a node computing circuit, for determining first node connection information of the full binary tree, and to determine second node connection information of a smallest full binary tree according to a smallest binary tree algorithm and the first node connection information; a load balance circuit, for determining user field numbers corresponding to content channels according to a load balance function and the second node connection information; a user field generation circuit, for generating a traversal result of the smallest full binary tree according to a traversal algorithm and the second node connection information, and for generating user fields corresponding to the content channels according to the traversal result, to generate the content channels.Type: GrantFiled: March 25, 2021Date of Patent: February 18, 2025Assignee: Realtek Semiconductor Corp.Inventors: Jhe-Yi Lin, Chun-Kai Tseng, Wen-Yung Lee, Shau-Yu Cheng
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Patent number: 9363901Abstract: A method of making a plurality of integrated circuit packages provides a metal strip. A first leadframe having a first die pad is formed on the metal strip. Also formed are a first plurality of leads with proximal ends adjacent to the first die pad, free distal ends positioned outwardly from the first die pad, and a first leadframe dam bar intersecting the proximal ends of the first plurality of leads. A second leadframe having a second die pad, a second plurality of leads with proximal ends adjacent to the second die pad and free distal ends positioned outwardly from the second die pad and a second leadframe dam bar intersecting the proximal ends of the second plurality of leads are formed on the metal strip. The free distal ends of said second plurality of leads are aligned with and adjacent to said free distal ends of said first plurality of leads.Type: GrantFiled: December 10, 2015Date of Patent: June 7, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Wen Yu Lee, Steven Su
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Patent number: 9337130Abstract: A leadframe strip including a first leadframe having a first die pad and a first plurality of generally parallel leads each extending outwardly relative to the first die pad and terminating in a free end and a second leadframe having a second die pad and a second plurality of generally parallel leads extending outwardly relative to the second die pad and terminating in a free end. The free ends of the second plurality of leads are positioned in close nontouching adjacent relationship with the free ends of the first plurality of leads. The two leadframes may be separated from each other by a single saw cut.Type: GrantFiled: July 28, 2014Date of Patent: May 10, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Wen Yu Lee, Steven Su
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Publication number: 20160100490Abstract: A method of making a plurality of integrated circuit packages provides a metal strip. A first leadframe having a first die pad is formed on the metal strip. Also formed are a first plurality of leads with proximal ends adjacent to the first die pad, free distal ends positioned outwardly from the first die pad, and a first leadframe dam bar intersecting the proximal ends of the first plurality of leads. A second leadframe having a second die pad, a second plurality of leads with proximal ends adjacent to the second die pad and free distal ends positioned outwardly from the second die pad and a second leadframe dam bar intersecting the proximal ends of the second plurality of leads are formed on the metal strip. The free distal ends of said second plurality of leads are aligned with and adjacent to said free distal ends of said first plurality of leads.Type: ApplicationFiled: December 10, 2015Publication date: April 7, 2016Inventors: Wen Yu Lee, Steven Su
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Publication number: 20160027721Abstract: A leadframe strip including a first leadframe having a first die pad and a first plurality of generally parallel leads each extending outwardly relative to the first die pad and terminating in a free end and a second leadframe having a second die pad and a second plurality of generally parallel leads extending outwardly relative to the second die pad and terminating in a free end. The free ends of the second plurality of leads are positioned in close nontouching adjacent relationship with the free ends of the first plurality of leads. The two leadframes may be separated from each other by a single saw cut.Type: ApplicationFiled: July 28, 2014Publication date: January 28, 2016Inventors: Wen Yu Lee, Steven Su
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Patent number: 9153454Abstract: A method of fabricating a high voltage device includes the step of forming a patterned photoresist layer on a conductive layer and a dielectric below the conductive. The conductive layer and the dielectric layer are patterned by taking the patterned photoresist layer as a mask. Subsequently the patterned photoresist layer is shrunk. The conductive layer and the dielectric layer are then patterned by taking the shrunk photoresist layer as a mask.Type: GrantFiled: June 17, 2013Date of Patent: October 6, 2015Assignee: UNITED MICROELECTRONICS CORP.Inventors: Yi-Hao Chen, Wen-Yu Lee, Hsiao-Wen Liu, Jung-Ching Chen
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Publication number: 20140370680Abstract: A method of fabricating a high voltage device includes the step of forming a patterned photoresist layer on a conductive layer and a dielectric below the conductive. The conductive layer and the dielectric layer are patterned by taking the patterned photoresist layer as a mask. Subsequently the patterned photoresist layer is shrunk. The conductive layer and the dielectric layer are then patterned by taking the shrunk photoresist layer as a mask.Type: ApplicationFiled: June 17, 2013Publication date: December 18, 2014Inventors: Yi-Hao Chen, Wen-Yu Lee, Hsiao-Wen Liu, Jung-Ching Chen
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Patent number: 8310069Abstract: The symbolization of a semiconductor device (100) is incorporated in a thin sheet (130) attached to the top of the device, facing outwardly with its bare surface. The material of the sheet (about 1 to 10 ?m thick) includes regions of a first optical reflectivity and a first color, and regions (133) of a second optical reflectivity and a second color, which differ from, and contrast with, the first reflectivity and color. Preferred choices for the sheet material include the compound o-cresol novolac epoxy and the compound bisphenol-A, more preferably with the chemical imidazole added to the film material. A preferred embodiment of the invention is a packaged device with a semiconductor chip a (101) connected to a substrate (102); the connection is achieved by bonding wires (111) forming an arch with a top 111a. The chip, the wire arches, and the substrate are embedded in an encapsulation material (120), which borders on the attached top sheet so that the arch tops touch the border (131).Type: GrantFiled: September 16, 2008Date of Patent: November 13, 2012Assignee: Texas Instruements IncorporatedInventors: Kazuaki Ano, Wen Yu Lee
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Publication number: 20090107313Abstract: An assembled blind cutting machine is provided. The assembled blind cutting machine includes a control console and at least a cutting device capable of moving to and fro along a pre-determined direction; each of the cutting devices having at least a cutting member; a linking member formed across between the control console and each of the cutting devices so as to integrate each of the cutting devices and the control console. Consequently, by matching cutting devices of different cutting members with the control console, the assembled blind cutting machine offers more options and enhanced extensibility.Type: ApplicationFiled: October 30, 2007Publication date: April 30, 2009Inventors: Ming Nien, Wen-Yu Lee
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Publication number: 20090091029Abstract: The symbolization of a semiconductor device (100) is incorporated in a thin sheet (130) attached to the top of the device, facing outwardly with its bare surface. The material of the sheet (about 1 to 10 ?m thick) includes regions of a first optical reflectivity and a first color, and regions (133) of a second optical reflectivity and a second color, which differ from, and contrast with, the first reflectivity and color. Preferred choices for the sheet material include the compound o-cresol novolac epoxy and the compound bisphenol-A, more preferably with the chemical imidazole added to the film material. A preferred embodiment of the invention is a packaged device with a semiconductor chip a (101) connected to a substrate (102); the connection is achieved by bonding wires (111) forming an arch with a top 111a. The chip, the wire arches, and the substrate are embedded in an encapsulation material (120), which borders on the attached top sheet so that the arch tops touch the border (131).Type: ApplicationFiled: September 16, 2008Publication date: April 9, 2009Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Kazuaki Ano, Wen Yu Lee
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Patent number: D967507Type: GrantFiled: December 17, 2020Date of Patent: October 18, 2022Assignee: GLOBAL LIGHTING TECHNOLOGY INC.Inventors: Wen-Yu Lee, Chin-Hung Hsu, Yung-Shin Chang