Patents by Inventor Wen-Yuan Chuang

Wen-Yuan Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250132235
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a first non-conductive layer over a top side a semiconductor die and patterning the first non-conductive layer to form an opening exposing a top surface of a bond of the semiconductor die. A metal trace of a redistribution layer is formed over a portion of the first non-conductive layer and exposed top surface of the bond pad. A surrounding bump metallization (SBM) structure is formed on a portion of the metal trace. The SBM structure includes a plurality of vertical metal wall segments surrounding a central opening.
    Type: Application
    Filed: October 18, 2023
    Publication date: April 24, 2025
    Inventors: Kuan-Hsiang Mao, Che Ming Fang, Wen Yuan Chuang, Wen Hung Huang
  • Publication number: 20240413192
    Abstract: A semiconductor device may include a semiconductor substrate and an isolation structure including a first dielectric layer formed over the semiconductor substrate, the first dielectric layer including one or more air gaps, and a first conductive structure formed on the dielectric layer, the conductive structure having a lower surface that faces the semiconductor substrate. Respective air gaps of the one or more air gaps of the first dielectric layer each may be disposed directly between corners of the lower surface of the conductive structure and the semiconductor substrate.
    Type: Application
    Filed: June 6, 2023
    Publication date: December 12, 2024
    Inventors: Paul Southworth, Michiel van Soestbergen, Amar Ashok Mavinkurve, Wen Yuan Chuang, Michael B. Vincent
  • Publication number: 20240339426
    Abstract: A leadless semiconductor package includes an integrated circuit (IC) die having one or more contacts at an active surface facing a mounting surface of the leadless semiconductor package. The leadless semiconductor package further includes a plurality of dual-sided stud structures providing electrical connectivity between the IC die and the mounting surface, each dual-sided stud structure having at least one first conductive pillar structure extending from a corresponding contact at the active surface to a redistribution layer and having at least one second conductive pillar structure extending from a redistribution layer to an edge of the mounting surface, each first conductive pillar structure having a first dimension in a direction parallel to the mounting surface that is less than a corresponding second dimension of each second conductive pillar structure. Solder wettable flanks may be formed at the external sidewall edges of the second conductive pillar structures to facilitate soldering or inspection.
    Type: Application
    Filed: April 7, 2023
    Publication date: October 10, 2024
    Inventors: Wen Yuan CHUANG, Kuan-Hsiang MAO, Wen Hung HUANG
  • Publication number: 20240014123
    Abstract: A method of forming a semiconductor device is provided. The method includes placing a semiconductor die and a leadframe on a carrier substrate. The semiconductor die includes a plurality of bond pads and the leadframe includes a plurality of leads. A first lead of the plurality of leads has a proximal end affixed to a first bond pad of the plurality of bond pads and a distal end placed on the carrier substrate. At least a portion of the semiconductor die and the leadframe is encapsulated with an encapsulant. The carrier substrate is separated from a first major side of the encapsulated semiconductor die and leadframe exposing a distal end portion of the first lead. A package substrate is applied on the first major side.
    Type: Application
    Filed: July 6, 2022
    Publication date: January 11, 2024
    Inventors: Kuan-Hsiang Mao, Chin Teck Siong, Pey Fang Hiew, Wen Yuan Chuang, Sharon Huey Lin Tay, Wen Hung Huang
  • Publication number: 20230326821
    Abstract: Five-side mold protection for semiconductor packages is described. In an illustrative, non-limiting embodiment, a semiconductor package may include: a substrate comprising a top surface, a bottom surface, and four sidewalls; an electrical component comprising a backside and a frontside, where the frontside of the electrical component is coupled to the top surface of the substrate; and a molding compound, where the molding compound encapsulates the backside of the electrical component and the four sidewalls of the substrate.
    Type: Application
    Filed: April 8, 2022
    Publication date: October 12, 2023
    Applicant: NXP B.V.
    Inventors: Kuan-Hsiang Mao, Wen Yuan Chuang, Wen Hung Huang
  • Patent number: 11244909
    Abstract: A package structure and a manufacturing method are provided. The package structure includes a wiring structure, a first electronic device and a second electronic device. The first electronic device is disposed on the wiring structure. The second electronic device is disposed on the wiring structure. The first electronic device and the second electronic device are disposed side by side. A gap between the first electronic device and the second electronic device is greater than or equal to about 150 ?m.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: February 8, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Fan-Yu Min, Chen-Hung Lee, Wei-Hang Tai, Yuan-Tzuo Luo, Wen-Yuan Chuang, Chun-Cheng Kuo, Chin-Li Kao
  • Publication number: 20210287999
    Abstract: A package structure and a manufacturing method are provided. The package structure includes a wiring structure, a first electronic device and a second electronic device. The first electronic device is disposed on the wiring structure. The second electronic device is disposed on the wiring structure. The first electronic device and the second electronic device are disposed side by side. A gap between the first electronic device and the second electronic device is greater than or equal to about 150 ?m.
    Type: Application
    Filed: March 12, 2020
    Publication date: September 16, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Fan-Yu MIN, Chen-Hung LEE, Wei-Hang TAI, Yuan-Tzuo LUO, Wen-Yuan CHUANG, Chun-Cheng KUO, Chin-Li KAO
  • Publication number: 20080123321
    Abstract: A backlight unit is disclosed. The backlight unit contains a light-generating device and a polarization conversion apparatus, wherein the polarization conversion apparatus acts as the top substrate of the light-generating device. The polarization conversion apparatus converts natural light originating from the light-generating device into polarized light of a predetermined polarization. Therefore, the backlight unit of the present invention is capable of providing polarized light.
    Type: Application
    Filed: January 24, 2007
    Publication date: May 29, 2008
    Inventors: Hung-Huei Hsu, Wen-Yuan Chuang
  • Publication number: 20060121356
    Abstract: An electrolyte for a rechargeable battery includes 20-70% by volume of at least two cyclic carbonates selected from ethylene carbonate, propylene carbonate, vinylene carbonate or butylenes carbonate, 30-80% by volume of an ester selected from propyl propionate, propyl acetate, butyl acetate or a mixture thereof, and a lithium salt.
    Type: Application
    Filed: December 7, 2004
    Publication date: June 8, 2006
    Applicant: Exa Energy Technology Co. Ltd.
    Inventors: Yih-Song Jan, Lun-Chien Ho, Shr-Ming Li, Tsung-Ting Hsieh, Wen-Yuan Chuang