Abstract: A method for forming a semiconductor device structure is provided. The method includes forming an interconnect structure over a substrate. The method includes forming a first conductive pad and a mask layer over the interconnect structure. The mask layer covers a top surface of the first conductive pad. The method includes forming a metal oxide layer over a sidewall of the first conductive pad. The method includes forming a second conductive pad over the first conductive pad and passing through the mask layer. The first conductive pad and the second conductive pad are made of different materials.

Abstract: A memory array and an operation method of the memory array are provided. The memory array includes first and second ferroelectric memory devices formed along a gate electrode, a channel layer and a ferroelectric layer between the gate electrode and the channel layer. The ferroelectric memory devices include: a common source/drain electrode and two respective source/drain electrodes, separately in contact with a side of the channel layer opposite to the ferroelectric layer, wherein the common source/drain electrode is disposed between the respective source/drain electrodes; and first and second auxiliary gates, capacitively coupled to the channel layer, wherein the first auxiliary gate is located between the common source/drain electrode and one of the respective source/drain electrodes, and the second auxiliary gate is located between the common source/drain electrode and the other respective source/drain electrode.

Abstract: A semiconductor device includes a semiconductor substrate, an isolation feature, gate lines, and a first gate structure. The isolation feature is over the semiconductor substrate and surrounding an active region of the semiconductor substrate. The gate lines extend across the active region of the semiconductor substrate. The first gate structure is over the isolation feature. The first gate structure comprises a first gate line, a second gate line, and a first bridge portion, the first and second gate lines are substantially parallel with the gate lines, and the first bridge portion connects the first gate line to the second gate line.

Abstract: In the touch operation method, a touch signal is generated in response to a touch operation performed on the touchpad, whether the touch operation is located in at least one predetermined region of the touchpad is determined according to the touch signal, and when the touch operation is located in the predetermined region, whether there is a displacement of the touch operation in a preset time interval is determined according to the touch signal. When it is determined that there is a displacement of the touch operation in the preset time interval, an operation signal corresponding to a predetermined function of the electronic device is generated according to the displacement of the touch operation, to perform the predetermined function.

Abstract: In the touch operation method, a touch signal is generated in response to a touch operation performed on the touchpad, whether the touch operation is located in at least one predetermined region of the touchpad is determined according to the touch signal, and when the touch operation is located in the predetermined region, whether there is a displacement of the touch operation in a preset time interval is determined according to the touch signal. When it is determined that there is a displacement of the touch operation in the preset time interval, an operation signal corresponding to a predetermined function of the electronic device is generated according to the displacement of the touch operation, to perform the predetermined function.