Abstract: A printed circuit board includes a grid of pads and tracks. The grid of pads includes a first pair of adjacent signal pads arranged in a first column and a second pair of adjacent signal pads arranged in a first row. A first signal pad of the second pair is arranged in the first column. The grid of pads also includes a third pair of adjacent signal pads arranged in a second row. A second signal pad of the first pair is arranged in the second row. The grid of pads further includes a fourth pair of adjacent signal pads arranged in a second column. A third signal pad of the third pair is arranged in the second column. A fourth signal pad of the fourth pair is arranged in the first row. The tracks are electrically coupled to the first, second, third, and fourth pairs.

Abstract: In some embodiments, an apparatus, includes a pad of a printed circuit board (PCB) configured to couple to an electrical component separate from the PCB and a via formed through the pad. The via is offset from a center of the pad such that a distance between the via and a most adjacent trace electrically separate from the via is above a threshold distance.

Abstract: A PCB includes a unique fanout pattern that reduces cross-talk in a new way, and still enables the power routing into the connector of the PCB. Both signal integrity and power integrity performance meets the 224 Gbps requirement in terms of crosstalk, insertion loss, and return loss. In addition, the techniques disclosed herein improve on the density of the PCB and avoid the need for additional layer changing transition VIAs.

Abstract: Provided for herein is an apparatus that includes a layer of a printed circuit board, a first pair of signal vias extending through the layer, a second pair of signal vias extending through the layer, a first plurality of ground vias extending through the layer, and a second plurality of ground vias extending through the layer. Each of the pairs of signal vias are configured to propagate respective signals. The first plurality of ground vias at least partially circumferentially surround a first signal via of the first pair of signal vias, and the second plurality of ground vias at least partially circumferentially surround a second signal via of the second pair of signal vias to reduce interference of electrical fields emitted by the pairs of signal vias. The first plurality of ground vias and the second plurality of ground vias share a common ground via.

Abstract: A process for improving or reducing impedance mismatches between VIAs and traces for signal frequencies at 56 GHZ and greater by using a lower dk material for backdrill filling. By reducing such impedance mismatches, which in other words results in reducing such mismatches, the performance result is a reduction in signal reflections. In some cases, the signal reflection reduction is significant.

Abstract: Embodiments herein describe disposing a magnetic material (e.g., a high permeability material) in a solder ball connection between two substrates (e.g., between an integrated circuit (IC) and a printed circuit board (PCB)). After a reflow process (which bonds two substrates together using solder balls), the solder balls become spherical, which causes the distance between two neighboring solder balls to decrease, which increases capacitance. The magnetic material can counterbalance the negative effects of the increased capacitance.

Abstract: A design and process address power delivery problems for PTH and one-step HDI designs. In some implementations, the quantity of layers may be reduced and the thickness of the board may be reduced. In one embodiment, a PCB is back drilled and a round cap plating is performed to get a more uniform power plane. In one implementation, the back drilled section of a VIA is plated as well, which provides a much bigger shape that is plated for power delivery.

Abstract: A multi-lamination stack up structure that separates high speed routing and the power delivery plane. The multi-lamination stack up structure includes M+N layers. The M layers are located on the top of the PCB and focus on high speed design routing. The N layers are located on the bottom of the PCB and are used for the power plane. In one implementation, the PCB uses a through hole or VIA for M+N layers power connection at the chip ball grid array area.

Abstract: In some embodiments, an apparatus includes a layer of a printed circuit board (PCB), a pair of signal vias formed on the layer of the PCB and including a first signal via a second signal via each configured to propagate a respective signal, a first plurality of ground vias formed on the layer and at least partially circumferentially surrounding the first signal via of the pair of signal vias, and a second plurality of ground vias formed on the layer and at least partially circumferentially surrounding the second signal via of the pair of signal vias. The first plurality of ground vias and the second plurality of ground vias include a shared ground via.

Abstract: Presented herein is a printed circuit board (PCB) assembly with an absorber having a perforated structure. The absorber is positioned between a trace of a PCB and a connector that couples the PCB to an enclosure. The absorber includes a perforated structure to maintain an integrity of a signal propagated along the trace, while improving electromagnetic interference and/or electromagnetic compatibility properties.

Abstract: In some embodiments, an apparatus, includes a pad of a printed circuit board (PCB) configured to couple to an electrical component separate from the PCB and a via formed through the pad. The via is offset from a center of the pad such that a distance between the via and a most adjacent trace electrically separate from the via is above a threshold distance.

Abstract: In some aspects, the techniques described herein relate to an apparatus including: a semiconductor device substrate material; a first signal conductor incorporated into the semiconductor device substrate material; a second signal conductor incorporated into the semiconductor device substrate material; and a ground conductor incorporated into the semiconductor device substrate material between the first signal conductor and the second signal conductor, wherein the ground conductor includes a first elongated portion and a second elongated portion arranged at an angle relative to the first elongated portion.

Abstract: A printed circuit board includes a grid of pads and tracks. The grid of pads includes a first pair of adjacent signal pads arranged in a first column and a second pair of adjacent signal pads arranged in a first row. A first signal pad of the second pair is arranged in the first column. The grid of pads also includes a third pair of adjacent signal pads arranged in a second row. A second signal pad of the first pair is arranged in the second row. The grid of pads further includes a fourth pair of adjacent signal pads arranged in a second column. A third signal pad of the third pair is arranged in the second column. A fourth signal pad of the fourth pair is arranged in the first row. The tracks are electrically coupled to the first, second, third, and fourth pairs.

Abstract: Methods and apparatus are described for splitting a page (or node) in an index tree database index for a multi-master database. The methods include creating a first split page of a first page. The first page belongs to a first set of pages and comprises a hinge page. The hinge page also belongs to a second set of pages. Updating the first set of pages may cause the hinge page itself to split, creating a split of the hinge page. The second set of pages is updated in response to creating the split of the hinge page. Described are techniques whereby the updates to the first and second sets of pages are atomic, that is, they all succeed or they all fail, which may realize any of several benefits.

Abstract: A gas oven with stations under parallel or synchronous control includes a plurality of temperature sensors, a controller and a plurality of processing stations. An air intake device includes a throttle valve, a gas transmission pipeline and a main gas valve. The throttle valve includes a combined gas control unit and a gas valve controller. The air intake device further includes an external gas supply source, and the gas supply source is connected to the gas transmission pipeline and a bakeware. The main gas valve and the throttle valve are separately arranged on the main gas transmission pipeline. The plurality of processing stations are provided with a plurality of gas sub-transmission pipelines and throttle valve gas main transmission pipelines, respectively. The gas oven further includes a communication module connected to a remote control to control the oven by way of a remote terminal or a mobile phone app.

Abstract: A control method of stepwise and stepless linear adjustment of a gas oven includes step 1: obtaining the setting temperature of the gas oven; step 2: obtaining the temperature inside the gas oven; step 3: determining the low temperature threshold, high temperature threshold and preset flame level according to the setting temperature, wherein the high temperature threshold is greater than the low temperature threshold; step 4: ensuring the temperature inside the gas oven is between the low temperature threshold and the high temperature threshold; step 5: if it exceeds, determining the change trend of the temperature inside the gas oven; step 6: when the change trend of the temperature inside the gas oven rises or falls, adjusting the flame level of the gas oven to the preset flame level.

Abstract: This application provides a data processing method and apparatus. The method includes: receiving, by a master storage node, information that is about a first transaction and that is sent by a read-write node, where the information about the first transaction is used to request to perform a write operation on first data stored on the master storage node; determining, by the master storage node, the first data based on the information about the first transaction, and executing the first transaction; generating, by the master storage node, first transaction status metadata when the first transaction ends, where the first transaction status metadata includes identification information of expired data and identification information of the first transaction; and sending, by the master storage node, the first transaction status metadata to at least one read-only node. According to the data processing method and apparatus, a read delay of a read-only node can be eliminated.

Abstract: The disclosed systems and methods are directed for detecting and resolving write-write conflicts among a plurality of transactions received from master nodes of a multi-writer database system. The method includes receiving a plurality of REDO logs and storing the plurality of REDO logs in a buffer, each REDO log associated with the one of the plurality of transactions, selecting one REDO log of the plurality of REDO logs; persisting the transaction associated with the one REDO log in a local storage when a write-write conflict is detected between the one REDO log and at least one other REDO log of the plurality of REDO logs prior to committing the transaction associated with the one REDO log; and transmitting a status of the transaction associated with the one REDO log to a global transaction manager (GTM).

Abstract: A machine learning-based method for automatically determining abnormal points of a single indicator includes step 1: randomly selecting M sample points from training data as subsamples, and putting them into a root node of a tree; and step 2: randomly specifying a data dimension for projection, and randomly generating a cutting point p in data of a current node, where the cutting point is generated between a maximum value and a minimum value of the specified dimension in the data of the current node. The present disclosure optimizes conventional data analysis linear model functions and regression model functions, constructs a computer neural network in the algorithm, puts multiple perceptron parameters in a multi-layer network for learning and training, and adopts the principle of principal component analysis, to find out the abnormal data that violates the data correlation.

Abstract: Methods and apparatus are described for splitting a page (or node) in an index tree database index for a multi-master database. The methods include creating a first split page of a first page. The first page belongs to a first set of pages and comprises a hinge page. The hinge page also belongs to a second set of pages. Updating the first set of pages may cause the hinge page itself to split, creating a split of the hinge page. The second set of pages is updated in response to creating the split of the hinge page. Described are techniques whereby the updates to the first and second sets of pages are atomic, that is, they all succeed or they all fail, which may realize any of several benefits.