Abstract: This disclosure provides a communication device and a manufacturing method thereof. The manufacturing method of the communication device includes the following steps: providing a first dielectric layer, wherein the first dielectric layer includes a first region and a second region, and the first dielectric layer has a first surface and a second surface opposite to the first surface; providing a second dielectric layer; combining the first dielectric layer and the second dielectric layer with a sealing element, so that the sealing element is disposed between the first surface of the first dielectric layer and a third surface of the second dielectric layer; after combining the first dielectric layer and the second dielectric layer, thinning the second surface of the first dielectric layer; and disposing a first communication element on the first surface of the first dielectric layer in the first region.

Abstract: A manufacturing method of an electronic device including following steps is provided. A first substrate is provided. A thermal release adhesive layer is provided on the first substrate. A thinning process is performed on the first substrate to form a first thinned substrate. A cutting process is performed on the first thinned substrate to form a first sub-substrate. The thermal release adhesive layer is separated from the first thinned substrate or the first sub-substrate. In the manufacturing method of the electronic device provided in one or more embodiments of the disclosure, the manufacturing process of the electronic device may be simplified, and/or defects of the resultant electronic device may be reduced.

Abstract: A pulse width modulation (PWM) controlling module, includes: a PWM controller, a load detector, and an adjusting module. The PWM controller generates a PWM signal that is utilized for controlling a supply voltage applied to an electronic system. The load detector, coupled to the PWM controller, detects a load of the electronic system according to the PWM signal and generates a decision value accordingly. The adjusting module, coupled to the PWM controller and the load detector, controls the PWM controller to adjust the PWM signal according to the decision value.

Abstract: A pulse width modulation (PWM) controlling module, includes: a PWM controller, a load detector, and an adjusting module. The PWM controller generates a PWM signal that is utilized for controlling a supply voltage applied to an electronic system. The load detector, coupled to the PWM controller, detects a load of the electronic system according to the PWM signal and generates a decision value accordingly. The adjusting module, coupled to the PWM controller and the load detector, controls the PWM controller to adjust the PWM signal according to the decision value.

Abstract: A method for adjusting an executing efficiency adapted in an electronic apparatus, wherein the electronic apparatus has a central processing unit (CPU) and uses an operating system to manage data. The method includes steps of obtaining a loading value when the operating system is executed to detect the CPU under the electronic apparatus operation, and adjusting a working frequency and a working voltage of the CPU corresponding to the loading value for achieving adjustment of the executing efficiency in the electronic apparatus.

Abstract: A method for transmitting a sound signal to report an event represented by the sound signal is disclosed. The method includes steps of receiving at least one signal in response to the event, recording the at least one signal in a first recorder in sequence, and accessing the at least one signal in sequence and reporting the event by transmitting the sound signal according to sound data corresponding to the at least one signal pre-recorded in a second recorder.

Abstract: The present invention discloses a universal clock generator, which comprises a high frequency clock region for generating high frequency clocks and a low frequency clock region for generating high frequency clocks. The low frequency clock region includes at least one delay lock loop for increasing the number of high frequency clocks of the high frequency clock region. When the number of high frequency clocks (such as a CPU clock, SDRAM clock, AGP clock and PCI clock) is not enough, the delay lock loop of the low frequency clock region can be cascaded to support insufficient clocks.

Abstract: The present invention discloses a universal clock generator, which comprises a high frequency clock region for generating high frequency clocks and a low frequency clock region for generating high frequency clocks. The low frequency clock region includes at least one delay lock loop for increasing the number of high frequency clocks of the high frequency clock region. When the number of high frequency clocks (such as a CPU clock, SDRAM clock, AGP clock and PCI clock) is not enough, the delay lock loop of the low frequency clock region can be cascaded to support insufficient clocks.

Abstract: The present invention relates to an adjustable clock skew apparatus and method for generating clock signals, which resolves the drawbacks of costing a user much time and effort to adjust clock skews of all components on a motherboard. In order to accomplish the object, the present invention proposes three operating modes: hardware setup, software setup or a mixture of hardward and software setup. A user just needs to adjust a plurality of exterior switches or to adjust a Basic Input Output System (BIOS) of the motherboard to modify the parameter of clock skew, and clock signals with necessary clock skews will be obtained.

Abstract: A method for transmitting a sound signal to report an event represented by the sound signal is disclosed. The method includes steps of receiving at least one signal in response to the event, recording the at least one signal in a first recorder in sequence, and accessing the at least one signal in sequence and reporting the event by transmitting the sound signal according to sound data corresponding to the at least one signal pre-recorded in a second recorder.

Abstract: A method for adjusting an executing efficiency adapted in an electronic apparatus, wherein the electronic apparatus has a central processing unit (CPU) and uses an operating system to manage data. The method includes steps of obtaining a loading value when the operating system is executed to detect the CPU under the electronic apparatus operation, and adjusting a working frequency and a working voltage of the CPU corresponding to the loading value for achieving adjustment of the executing efficiency in the electronic apparatus.