Patents by Inventor Wencong Liu

Wencong Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Detachable anti-vibration sealing protection device for pipe flange
    Patent number: 11953125
    Abstract: The embodiments of the present disclosure provide a detachable anti-vibration sealing protection device for a pipe flange. The protection device includes a casing, wherein left and right end surfaces of the casing have through holes for the pipeline to pass through, and the casing has an accommodation cavity for placing the flange; a first shock absorption assembly for radial shock absorption of the flange; and a second shock absorption assembly which is installed in a one-to-one correspondence with the flange and is configured for axial shock absorption of the corresponding flange. The first shock absorption assembly and the second shock absorption assembly are installed in the accommodation cavity.
    Type: Grant
    Filed: May 22, 2023
    Date of Patent: April 9, 2024
    Assignee: CHANGZHOU UNIVERSITY
    Inventors: Hong Ji, Yuchen Liu, Ke Yang, Zhixiang Xing, Juncheng Jiang, Yinhan Zhao, Jie Guo, Ting Wang, Wencong Shen
  • Method for preparing organic electroluminescent device, and organic electroluminescent device and display apparatus
    Patent number: 11917894
    Abstract: Provided are a method for preparing an organic electroluminescent device, an organic electroluminescent device and a display apparatus.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: February 27, 2024
    Assignee: GUANGZHOU NEW VISION OPTO-ELECTRONIC TECHNOLOGY CO., LTD.
    Inventors: Jianhua Zou, Miao Xu, Hong Tao, Lei Wang, Hongmeng Li, Wencong Liu, Hua Xu, Min Li, Junbiao Peng
  • METHOD FOR PREPARING ORGANIC ELECTROLUMINESCENT DEVICE, AND ORGANIC ELECTROLUMINESCENT DEVICE AND DISPLAY APPARATUS
    Publication number: 20220059808
    Abstract: Provided are a method for preparing an organic electroluminescent device, an organic electroluminescent device and a display apparatus.
    Type: Application
    Filed: March 4, 2019
    Publication date: February 24, 2022
    Applicant: GUANGZHOU NEW VISION OPTO-ELECTRONIC TECHNOLOGY CO., LTD.
    Inventors: Jianhua Zou, Miao Xu, Hong Tao, Lei Wang, Hongmeng Li, Wencong Liu, Hua Xu, Min Li, Junbiao Peng
  • Low resistance contact interlayer for semiconductor devices
    Patent number: 10833187
    Abstract: A semiconductor device includes a substrate and a p-doped layer including a doped III-V material on the substrate. An n-type material is formed on or in the p-doped layer. The n-type material includes an oxide of a II-VI material. An oxygen scavenging interlayer is formed on the n-type material. An aluminum contact is formed in direct contact with the oxygen scavenging interlayer to form an electronic device.
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: November 10, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeehwan Kim, Wencong Liu, Devendra K. Sadana
  • Tunable semiconductor band gap reduction by strained sidewall passivation
    Patent number: 9865520
    Abstract: A semiconductor device includes a mesa structure having vertical sidewalls, the mesa structure including an active area comprising a portion of its height. A stressed passivation liner is formed on the vertical sidewalls of the mesa structure and over the portion of the active area. The stressed passivation liner induces strain in the active area to permit tuning of performance parameters of the mesa structure.
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: January 9, 2018
    Assignee: International Business Machines Corporation
    Inventors: Christopher Heidelberger, Jeehwan Kim, Ning Li, Wencong Liu, Devendra K. Sadana
  • TUNABLE SEMICONDUCTOR BAND GAP REDUCTION BY STRAINED SIDEWALL PASSIVATION
    Publication number: 20170040240
    Abstract: A semiconductor device includes a mesa structure having vertical sidewalls, the mesa structure including an active area comprising a portion of its height. A stressed passivation liner is formed on the vertical sidewalls of the mesa structure and over the portion of the active area. The stressed passivation liner induces strain in the active area to permit tuning of performance parameters of the mesa structure.
    Type: Application
    Filed: August 7, 2015
    Publication date: February 9, 2017
    Inventors: Christopher Heidelberger, Jeehwan Kim, Ning Li, Wencong Liu, Devendra K. Sadana
  • LOW RESISTANCE CONTACT INTERLAYER FOR SEMICONDUCTOR DEVICES
    Publication number: 20170040463
    Abstract: A semiconductor device includes a substrate and a p-doped layer including a doped III-V material on the substrate. An n-type material is formed on or in the p-doped layer. The n-type material includes an oxide of a II-VI material. An oxygen scavenging interlayer is formed on the n-type material. An aluminum contact is formed in direct contact with the oxygen scavenging interlayer to form an electronic device.
    Type: Application
    Filed: August 7, 2015
    Publication date: February 9, 2017
    Inventors: Jeehwan Kim, Wencong Liu, Devendra K. Sadana