Abstract: A flyback converter control architecture is provided in which primary-only feedback techniques are used to ensure smooth startup and detection of fault conditions. During steady-state operation, secondary-side regulation is employed. In addition, current limits are monitored during steady-state operation using primary-only feedback techniques to obviate the need for a secondary-side current sense resistor.

Abstract: A failure detection circuit for a power switch transistor in a power switching converter is provided that compares a drive voltage for driving a gate of the power switch transistor to a plurality of thresholds. Based upon when the drive voltage crosses each threshold in the plurality of thresholds, a logic circuit determines whether a fault condition exists for the power switch transistor.

Abstract: A gate drive control circuit is provided that charges a gate voltage of a power switch transistor during a power switch transistor on-time period. During a first portion of the on-time period, the gate drive control circuit charges the gate voltage through a relatively-low resistance. During a second portion of the on-time period, the gate drive control circuit charges the gate voltage through a relatively-high resistance. Finally, during a third portion of the on-time period, the gate drive control circuit charges the gate voltage through another relatively-low resistance.

Abstract: A switching power converter is provided that adaptively changes the on-time period for an auxiliary switch transistor to locate a boundary between sufficient and insufficient energy.

Abstract: A flyback converter communication channel is provided that comprises a pair of capacitors. A transmitter on a first side of a transformer for the flyback converter transmits a transmitter signal over a first one of the capacitors. The transmitter also transmits a complement of the transmitter signal over a second one of the capacitors. A receiver on a second side of the transformer controls a switch transistor responsive to a high-pass-filtered difference of the received signals from the pair of capacitors.

Abstract: An auxiliary winding for a flyback converter includes a floating terminal coupled to ground through a diode. A primary-side controller has a power supply voltage terminal coupled to a remaining terminal of the auxiliary winding and has a voltage sense terminal coupled to the floating terminal.

Abstract: A standby power system for a flyback converter is disclosed. The flyback converter includes a primary-side, a secondary-side, an output terminal at the secondary-side, and a secondary-side controller, where the output terminal is configured to electrically connect to a load. The standby power system comprises a comparator at the secondary-side, an opto-coupler in signal communication with the primary-side, the secondary-side, and the comparator, and a cable detach detector (or load detector). The cable detach detector is configured to determine whether a device is electrically connected to the flyback converter through a charging cable and to set the flyback converter into a standby mode if the deice is disconnected from the charging cable.

Abstract: A flyback converter is disclosed that includes an auxiliary switch controller that adaptively controls the auxiliary switch for improved zero voltage switching. The auxiliary switch control adaptively adjusts the auxiliary switch on-time period responsive to a transformer reset time for the flyback converter, a resonant oscillation period for a power switch terminal voltage for a power switch transistor, and an on-time period for the power switch transistor to provide the improved zero voltage switching.

Abstract: A gate drive control circuit is provided that charges a gate voltage of a power switch transistor during a power switch transistor on-time period. During a first portion of the on-time period, the gate drive control circuit charges the gate voltage through a relatively-low resistance. During a second portion of the on-time period, the gate drive control circuit charges the gate voltage through a relatively-high resistance. Finally, during a third portion of the on-time period, the gate drive control circuit charges the gate voltage through another relatively-low resistance.

Abstract: An auxiliary winding for a flyback converter includes a floating terminal coupled to ground through a diode. A primary-side controller has a power supply voltage terminal coupled to a remaining terminal of the auxiliary winding and has a voltage sense terminal coupled to the floating terminal.

Abstract: A flyback converter control architecture is provided in which primary-only feedback techniques are used to ensure smooth startup and detection of fault conditions. During steady-state operation, secondary-side regulation is employed. In addition, current limits are monitored during steady-state operation using primary-only feedback techniques to obviate the need for a secondary-side current sense resistor.

Abstract: A standby power system for a flyback converter is disclosed. The flyback converter includes a primary-side, a secondary-side, an output terminal at the secondary-side, and a secondary-side controller, where the output terminal is configured to electrically connect to a load. The standby power system comprises a comparator at the secondary-side, an opto-coupler in signal communication with the primary-side, the secondary-side, and the comparator, and a cable detach detector (or load detector). The cable detach detector is configured to determine whether a device is electrically connected to the flyback converter through a charging cable and to set the flyback converter into a standby mode if the deice is disconnected from the charging cable.

Abstract: A DALI interface is provided that includes a digital isolator having an input terminal and an output terminal. A DALI bus controlled by a master device controls a binary voltage state of a voltage rail. A DFET couples between the input terminal and the output terminal to control a voltage of the input terminal responsive to the control of the DALI bus by the master device. The digital isolator responds to the control of the input terminal voltage to drive a digital signal through an isolation barrier to control a voltage of the output terminal to control a slave lighting device.

Abstract: Disclosed is a universal primary-only output current regulation for a flyback converter. A controller determines a peak sense resistor voltage responsive to a desired average output current for the flyback converter during a continuous conduction mode of operation. After a power switch transistor is cycled on, the controller monitors a sense resistor voltage to determine when the sense resistor voltage equals the peak sense resistor voltage. The controller switches off the power switch transistor when the sense resistor voltage equals the peak sense resistor voltage to maintain an average output current for the flyback converter equal to the desired average output current.

Abstract: Disclosed is a universal primary-only output current regulation for a flyback converter. A controller determines a peak sense resistor voltage responsive to a desired average output current for the flyback converter during a continuous conduction mode of operation. After a power switch transistor is cycled on, the controller monitors a sense resistor voltage to determine when the sense resistor voltage equals the peak sense resistor voltage. The controller switches off the power switch transistor when the sense resistor voltage equals the peak sense resistor voltage to maintain an average output current for the flyback converter equal to the desired average output current.

Abstract: A flyback converter is disclosed that times a detection time for each cycle of a power switch transistor. The detection time ends when a sense resistor voltage exceeds a threshold voltage. Over a half cycle of an AC input voltage to the flyback converter measures a series of detection time and determines a minimum detection time from the series of detection times. If the minimum detection time exceeds a brownout delay, a brownout condition exists. If the minimum detection time is less than an overvoltage delay, an overvoltage condition exists.

Abstract: A flyback converter control architecture is provided in which primary-only feedback techniques are used to ensure smooth startup and detection of fault conditions. During steady-state operation, secondary-side regulation is employed. In addition, current limits are monitored during steady-state operation using primary-only feedback techniques to obviate the need for a secondary-side current sense resistor.

Abstract: A flyback converter communication channel is provided that comprises a pair of capacitors. A transmitter on a first side of a transformer for the flyback converter transmits a transmitter signal over a first one of the capacitors. The transmitter also transmits a complement of the transmitter signal over a second one of the capacitors. A receiver on a second side of the transformer controls a switch transistor responsive to a high-pass-filtered difference of the received signals from the pair of capacitors.

Abstract: A flyback converter is disclosed that times a detection time for each cycle of a power switch transistor. The detection time ends when a sense resistor voltage exceeds a threshold voltage. Over a half cycle of an AC input voltage to the flyback converter measures a series of detection time and determines a minimum detection time from the series of detection times. If the minimum detection time exceeds a brownout delay, a brownout condition exists. If the minimum detection time is less than an overvoltage delay, an overvoltage condition exists.

Abstract: A flyback converter is disclosed that includes an auxiliary switch controller that adaptively controls the auxiliary switch for improved zero voltage switching.