Patents by Inventor Weng Chuen Edmund Neo

Weng Chuen Edmund Neo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9641140
    Abstract: A matching network and method for matching a source impedance to a load impedance is provided. A bias feed microstrip structure is coupled to a direct current (DC) voltage source and has a bias feed microstrip electrical length less than one fifth of a fundamental wavelength of a fundamental frequency component of an input signal. A harmonic impedance transformation network can be configured to compensate for parasitic reactances of a precursor element. A tuned impedance element presents a short circuit impedance at the second harmonic impedance transformation network terminal for harmonic frequency components and presents a higher impedance for the fundamental frequency component. A fundamental impedance transformation network is configured to match a fundamental impedance transformation network input impedance for the fundamental frequency component to a load impedance of a load. Multiple instances of the harmonic impedance transformation network and the tuned impedance element can be provided.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: May 2, 2017
    Assignee: NXP USA, INC.
    Inventors: Ramanujam Srinidhi Embar, Weng Chuen Edmund Neo, Yu-Ting D. Wu
  • Publication number: 20150381140
    Abstract: A matching network and method for matching a source impedance to a load impedance is provided. A bias feed microstrip structure is coupled to a direct current (DC) voltage source and has a bias feed microstrip electrical length less than one fifth of a fundamental wavelength of a fundamental frequency component of an input signal. A harmonic impedance transformation network can be configured to compensate for parasitic reactances of a precursor element. A tuned impedance element presents a short circuit impedance at the second harmonic impedance transformation network terminal for harmonic frequency components and presents a higher impedance for the fundamental frequency component. A fundamental impedance transformation network is configured to match a fundamental impedance transformation network input impedance for the fundamental frequency component to a load impedance of a load. Multiple instances of the harmonic impedance transformation network and the tuned impedance element can be provided.
    Type: Application
    Filed: June 27, 2014
    Publication date: December 31, 2015
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Ramanujam Srinidhi Embar, Weng Chuen Edmund Neo, Yu-Ting D. Wu
  • Patent number: 8022760
    Abstract: A 3-way Doherty amplifier has an amplifier input and an amplifier output. The amplifier has a main stage, a first peak stage and a second peak stage. The amplifier has an input network connecting the amplifier input to the inputs of the stages, and an output network connecting the stages to the amplifier output. The output network implements a phase shift of 90° between the output of the main stage and the amplifier output; a phase shift of 180° between the output of the first peak stage and the amplifier output; and a phase shift of 90° between the third output and the amplifier output.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: September 20, 2011
    Assignee: NXP B.V.
    Inventors: Radjindrepersad Gajadharsing, Weng Chuen Edmund Neo, Marco Johannes Pelk, Leonardus Cornelis Nicolaas De Vreede, Ji Zhao