Patents by Inventor Weng Hing Tan

Weng Hing Tan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9875988
    Abstract: A semiconductor device has a first semiconductor die disposed over a substrate. A plurality of composite interconnect structures are formed over the semiconductor die. The composite interconnect structures have a non-fusible conductive pillar and a fusible layer formed over the non-fusible conductive pillar. The fusible layer is reflowed to connect the first semiconductor die to a conductive layer of the substrate. The non-fusible conductive pillar does not melt during reflow eliminating a need to form a solder resist over the substrate. An encapsulant is deposited around the first semiconductor die and composite interconnect structures. The encapsulant flows between the active surface of the first semiconductor die and the substrate. A second semiconductor die is disposed over the substrate adjacent to the first semiconductor die. A heat spreader is disposed over the first semiconductor die. A portion of the encapsulant is removed to expose the heat spreader.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: January 23, 2018
    Assignee: Semtech Corporation
    Inventors: Satyamoorthi Chinnusamy, Weng Hing Tan, Andrew Pan, Kok Khoon Ho
  • Publication number: 20170236790
    Abstract: A semiconductor device includes a substrate and a first conductive layer formed over a first surface of the substrate. The first conductive layer is patterned into a first portion of a first passive circuit element. The first conductive layer is patterned to include a first coiled portion. A second conductive layer is formed over a second surface of the substrate. The second conductive layer is patterned into a second portion of the first passive circuit element. The second conductive layer is patterned to include a second coiled portion exhibiting mutual inductance with the first coiled portion. A conductive via formed through the substrate is coupled between the first conductive layer and second conductive layer. A semiconductor component is disposed over the substrate and electrically coupled to the first passive circuit element. An encapsulant is deposited over the semiconductor component and substrate. The substrate is mounted to a printed circuit board.
    Type: Application
    Filed: February 12, 2016
    Publication date: August 17, 2017
    Applicant: Semtech Corporation
    Inventors: Satyamoorthi Chinnusamy, Weng Hing Tan, Jayson Nathaniel S. Reyes
  • Publication number: 20170125375
    Abstract: A semiconductor device has a first semiconductor die disposed over a substrate. A plurality of composite interconnect structures are formed over the semiconductor die. The composite interconnect structures have a non-fusible conductive pillar and a fusible layer formed over the non-fusible conductive pillar. The fusible layer is reflowed to connect the first semiconductor die to a conductive layer of the substrate. The non-fusible conductive pillar does not melt during reflow eliminating a need to form a solder resist over the substrate. An encapsulant is deposited around the first semiconductor die and composite interconnect structures. The encapsulant flows between the active surface of the first semiconductor die and the substrate. A second semiconductor die is disposed over the substrate adjacent to the first semiconductor die. A heat spreader is disposed over the first semiconductor die. A portion of the encapsulant is removed to expose the heat spreader.
    Type: Application
    Filed: October 29, 2015
    Publication date: May 4, 2017
    Applicant: Semtech Corporation
    Inventors: Satyamoorthi Chinnusamy, Weng Hing Tan, Andrew Pan, Kok Khoon Ho