Patents by Inventor Wenguang Shi
Wenguang Shi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11956953Abstract: Joint opening structures of 3D memory devices and fabricating method are provided. A joint opening structure comprises a first through hole penetrating a first stacked layer and a first insulating connection layer, a first channel structure at the bottom of the first through hole, a first functional layer on the sidewall of the first through hole, a second channel structure on the sidewall of the first functional layer, a third channel structure over the first through hole, a second stacked layer on the third channel structure, a second insulating connection layer on the second stacked layer, a second through hole penetrating the second stacked layer and the second insulating connection layer, a second functional layer disposed on the sidewall of the second through hole, a fourth channel structure on the sidewall of the second functional layer, and a fifth channel structure over the second through hole.Type: GrantFiled: September 21, 2022Date of Patent: April 9, 2024Assignee: Yangtze Memory Technologies Co., Ltd.Inventors: Zhenyu Lu, Wenguang Shi, Guanping Wu, Feng Pan, Xianjin Wan, Baoyou Chen
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Publication number: 20230389323Abstract: A three-dimensional (3D) memory device includes a staircase region including a first stack and a second stack, a barrier structure extending vertically through the first stack and laterally separating the first stack from the second stack, and a through array contact extending vertically through the first stack. The first stack includes first and second dielectric layers arranged alternately in a vertical direction. The second stack includes conductor layers and third dielectric layers arranged alternately in the vertical direction. The barrier structure includes an unclosed shape.Type: ApplicationFiled: August 8, 2023Publication date: November 30, 2023Inventors: Zhenyu Lu, Wenguang Shi, Guanping Wu, Xianjin Wan, Baoyou Chen
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Publication number: 20230363169Abstract: A three-dimensional (3D) NAND memory device includes a substrate, a staircase region including a first stack and a second stack, a barrier structure extending vertically through the first stack and laterally separating the first stack from the second stack, and a through array contact extending vertically through the first stack to the substrate. The first stack is disposed on the substrate and includes first and second dielectric layers arranged alternately in a vertical direction. The second stack is disposed on the substrate and includes conductor layers and third dielectric layers arranged alternately in the vertical direction. The barrier structure has an unclosed shape.Type: ApplicationFiled: July 12, 2023Publication date: November 9, 2023Inventors: Zhenyu LU, Simon Shi-Ning YANG, Feng PAN, Steve Weiyi YANG, Jun CHEN, Guanping WU, Wenguang SHI, Weihua CHENG
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Patent number: 11785776Abstract: Embodiments of through array contact structures of a 3D memory device is disclosed. The 3D NAND memory device includes an alternating layer stack disposed on a substrate. The alternating layer stack includes a first region including an alternating dielectric stack, and a second region including an alternating conductor/dielectric stack. The memory device further comprises a barrier structure extending vertically through the alternating layer stack to laterally separate the first region from the second region, and multiple through array contacts in the first region each extending vertically through the alternating dielectric stack. At least one through array contact is electrically connected with a peripheral circuit.Type: GrantFiled: September 14, 2022Date of Patent: October 10, 2023Assignee: Yangtze Memory Technologies Co., Ltd.Inventors: Zhenyu Lu, Wenguang Shi, Guanping Wu, Xianjin Wan, Baoyou Chen
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Patent number: 11758732Abstract: Embodiments of through array contact structures of a 3D memory device and fabricating method thereof are disclosed. The memory device includes an alternating layer stack disposed on a first substrate. The alternating layer stack includes a first region including an alternating dielectric stack, and a second region including an alternating conductor/dielectric stack. The memory device further comprises a barrier structure including two parallel barrier walls extending vertically through the alternating layer stack and laterally along a word line direction to laterally separate the first region from the second region. The memory device further comprises a plurality of through array contacts in the first region, each through array contact extending vertically through the alternating dielectric stack.Type: GrantFiled: November 3, 2022Date of Patent: September 12, 2023Assignee: Yangtze Memory Technologies Co., Ltd.Inventors: Zhenyu Lu, Simon Shi-Ning Yang, Feng Pan, Steve Weiyi Yang, Jun Chen, Guanping Wu, Wenguang Shi, Weihua Cheng
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Publication number: 20230087468Abstract: Embodiments of through array contact structures of a 3D memory device and fabricating method thereof are disclosed. The memory device includes an alternating layer stack disposed on a first substrate. The alternating layer stack includes a first region including an alternating dielectric stack, and a second region including an alternating conductor/dielectric stack. The memory device further comprises a barrier structure including two parallel barrier walls extending vertically through the alternating layer stack and laterally along a word line direction to laterally separate the first region from the second region. The memory device further comprises a plurality of through array contacts in the first region, each through array contact extending vertically through the alternating dielectric stack.Type: ApplicationFiled: November 3, 2022Publication date: March 23, 2023Applicant: Yangtze Memory Technologies Co., Ltd.Inventors: Zhenyu LU, Simon Shi-Ning YANG, Feng PAN, Steve Weiyi YANG, Jun CHEN, Guanping WU, Wenguang SHI, Weihua CHENG
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Publication number: 20230016627Abstract: Joint opening structures of 3D memory devices and fabricating method are provided. A joint opening structure comprises a first through hole penetrating a first stacked layer and a first insulating connection layer, a first channel structure at the bottom of the first through hole, a first functional layer on the sidewall of the first through hole, a second channel structure on the sidewall of the first functional layer, a third channel structure over the first through hole, a second stacked layer on the third channel structure, a second insulating connection layer on the second stacked layer, a second through hole penetrating the second stacked layer and the second insulating connection layer, a second functional layer disposed on the sidewall of the second through hole, a fourth channel structure on the sidewall of the second functional layer, and a fifth channel structure over the second through hole.Type: ApplicationFiled: September 21, 2022Publication date: January 19, 2023Applicant: Yangtze Memory Technologies Co., Ltd.Inventors: Zhenyu LU, Wenguang Shi, Guanping Wu, Feng Pan, Xianjin Wan, Baoyou Chen
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Publication number: 20230005950Abstract: Embodiments of through array contact structures of a 3D memory device is disclosed. The 3D NAND memory device includes an alternating dielectric stack comprising a plurality of dielectric layer pairs arranged in a vertical direction; n alternating conductor/dielectric stack comprising a plurality of conductor/dielectric layer pairs arranged in the vertical direction; and at least one through array contact extending through the alternating dielectric stack in the vertical direction; a barrier structure separates the alternating dielectric stack and the alternating conductor/dielectric stack, an opening of the barrier structure is at an edge of the alternating dielectric stack along a lateral direction, the lateral direction is perpendicular to the vertical direction.Type: ApplicationFiled: September 14, 2022Publication date: January 5, 2023Applicant: Yangtze Memory Technologies Co., Ltd.Inventors: Zhenyu LU, Wenguang SHI, Guanping WU, Xianjin WAN, Baoyou CHEN
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Patent number: 11545505Abstract: Embodiments of through array contact structures of a 3D memory device and fabricating method thereof are disclosed. The 3D NAND memory device includes an alternating layer stack disposed on a substrate. The alternating layer stack includes a first region including an alternating dielectric stack, and a second region including an alternating conductor/dielectric stack. The memory device further comprises a barrier structure extending vertically through the alternating layer stack to laterally separate the first region from the second region, and multiple through array contacts in the first region each extending vertically through the alternating dielectric stack. At least one through array contact is electrically connected with a peripheral circuit.Type: GrantFiled: January 6, 2021Date of Patent: January 3, 2023Assignee: Yangtze Memory Technologies Co., Ltd.Inventors: Zhenyu Lu, Wenguang Shi, Guanping Wu, Xianjin Wan, Baoyou Chen
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Patent number: 11527547Abstract: Embodiments of through array contact structures of a 3D memory device and fabricating method thereof are disclosed. The memory device includes an alternating layer stack disposed on a first substrate. The alternating layer stack includes a first region including an alternating dielectric stack, and a second region including an alternating conductor/dielectric stack. The memory device further comprises a barrier structure including two parallel barrier walls extending vertically through the alternating layer stack and laterally along a word line direction to laterally separate the first region from the second region. The memory device further comprises a plurality of through array contacts in the first region, each through array contact extending vertically through the alternating dielectric stack.Type: GrantFiled: January 13, 2021Date of Patent: December 13, 2022Assignee: Yangtze Memory Technologies Co., Ltd.Inventors: Zhenyu Lu, Simon Shi-Ning Yang, Feng Pan, Steve Weiyi Yang, Jun Chen, Guanping Wu, Wenguang Shi, Weihua Cheng
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Patent number: 11482532Abstract: Joint opening structures of 3D memory devices and fabricating method are provided. A joint opening structure comprises a first through hole penetrating a first stacked layer and a first insulating connection layer, a first channel structure at the bottom of the first through hole, a first functional layer on the sidewall of the first through hole, a second channel structure on the sidewall of the first functional layer, a third channel structure over the first through hole, a second stacked layer on the third channel structure, a second insulating connection layer on the second stacked layer, a second through hole penetrating the second stacked layer and the second insulating connection layer, a second functional layer disposed on the sidewall of the second through hole, a fourth channel structure on the sidewall of the second functional layer, and a fifth channel structure over the second through hole.Type: GrantFiled: November 18, 2020Date of Patent: October 25, 2022Assignee: Yangtze Memory Technologies Co., Ltd.Inventors: Zhenyu Lu, Wenguang Shi, Guanping Wu, Feng Pan, Xianjin Wan, Baoyou Chen
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Publication number: 20210134826Abstract: Embodiments of through array contact structures of a 3D memory device and fabricating method thereof are disclosed. The memory device includes an alternating layer stack disposed on a first substrate. The alternating layer stack includes a first region including an alternating dielectric stack, and a second region including an alternating conductor/dielectric stack. The memory device further comprises a barrier structure including two parallel barrier walls extending vertically through the alternating layer stack and laterally along a word line direction to laterally separate the first region from the second region. The memory device further comprises a plurality of through array contacts in the first region, each through array contact extending vertically through the alternating dielectric stack.Type: ApplicationFiled: January 13, 2021Publication date: May 6, 2021Applicant: Yangtze Memory Technologies Co., Ltd.Inventors: Zhenyu LU, Simon Shi-Ning YANG, Feng PAN, Steve Weiyi YANG, Jun CHEN, Guanping WU, Wenguang SHI, Weihua CHENG
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Publication number: 20210126005Abstract: Embodiments of through array contact structures of a 3D memory device and fabricating method thereof are disclosed. The 3D NAND memory device includes an alternating layer stack disposed on a substrate. The alternating layer stack includes a first region including an alternating dielectric stack, and a second region including an alternating conductor/dielectric stack. The memory device further comprises a barrier structure extending vertically through the alternating layer stack to laterally separate the first region from the second region, and multiple through array contacts in the first region each extending vertically through the alternating dielectric stack. At least one through array contact is electrically connected with a peripheral circuit.Type: ApplicationFiled: January 6, 2021Publication date: April 29, 2021Applicant: Yangtze Memory Technologies Co., Ltd.Inventors: Zhenyu LU, Wenguang Shi, Guanping Wu, Xianjin Wan, Baoyou Chen
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Publication number: 20210074718Abstract: Joint opening structures of 3D memory devices and fabricating method are provided. A joint opening structure comprises a first through hole penetrating a first stacked layer and a first insulating connection layer, a first channel structure at the bottom of the first through hole, a first functional layer on the sidewall of the first through hole, a second channel structure on the sidewall of the first functional layer, a third channel structure over the first through hole, a second stacked layer on the third channel structure, a second insulating connection layer on the second stacked layer, a second through hole penetrating the second stacked layer and the second insulating connection layer, a second functional layer disposed on the sidewall of the second through hole, a fourth channel structure on the sidewall of the second functional layer, and a fifth channel structure over the second through hole.Type: ApplicationFiled: November 18, 2020Publication date: March 11, 2021Applicant: Yangtze Memory Technologies Co., Ltd.Inventors: Zhenyu LU, Wenguang SHI, Guanping WU, Feng PAN, Xianjin WAN, Baoyou CHEN
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Patent number: 10930663Abstract: Embodiments of interconnect structures of a three-dimensional (3D) memory device and method for forming the interconnect structures are disclosed. In an example, a 3D NAND memory device includes a substrate, an alternating layer stack including a staircase structure on the substrate, and a barrier structure extending vertically through the alternating layer stack. The alternating layer stack includes an alternating dielectric stack and an alternating conductor/dielectric stack. The alternating dielectric stack includes dielectric layer pairs enclosed by at least the barrier structure. The alternating conductor/dielectric stack includes conductor/dielectric layer pairs. The memory device further includes a channel structure and a slit structure each extending vertically through the alternating conductor/dielectric stack, an etch stop layer on an end of the channel structure, and first contacts.Type: GrantFiled: July 26, 2018Date of Patent: February 23, 2021Assignee: Yangtze Memory Technologies Co., Ltd.Inventors: Zhenyu Lu, Lidong Song, Yongna Li, Feng Pan, Steve Weiyi Yang, Wenguang Shi
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Patent number: 10923491Abstract: Embodiments of through array contact structures of a 3D memory device and fabricating method thereof are disclosed. The memory device includes an alternating layer stack disposed on a first substrate. The alternating layer stack includes a first region including an alternating dielectric stack, and a second region including an alternating conductor/dielectric stack. The memory device further includes a barrier structure extending vertically through the alternating layer stack to laterally separate the first region from the second region, multiple through array contacts in the first region, each through array contact extending vertically through the alternating dielectric stack, an array interconnection layer in contact with the through array contacts, a peripheral circuit formed on a second substrate. and a peripheral interconnection layer on the peripheral circuit.Type: GrantFiled: March 17, 2020Date of Patent: February 16, 2021Assignee: Yangtze Memory Technologies Co., Ltd.Inventors: Zhenyu Lu, Simon Shi-Ning Yang, Feng Pan, Steve Weiyi Yang, Jun Chen, Guanping Wu, Wenguang Shi, Weihua Cheng
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Publication number: 20210043643Abstract: Embodiments of interconnect structures of a three-dimensional (3D) memory device and method for forming the interconnect structures are disclosed. In an example, a 3D NAND memory device includes a substrate, an alternating layer stack including a staircase structure on the substrate, and a barrier structure extending vertically through the alternating layer stack. The alternating layer stack includes an alternating dielectric stack and an alternating conductor/dielectric stack. The alternating dielectric stack includes dielectric layer pairs enclosed by at least the barrier structure. The alternating conductor/dielectric stack includes conductor/dielectric layer pairs. The memory device further includes a channel structure and a slit structure each extending vertically through the alternating conductor/dielectric stack, an etch stop layer on an end of the channel structure, and first contacts.Type: ApplicationFiled: October 26, 2020Publication date: February 11, 2021Applicant: Yangtze Memory Technologies Co., Ltd.Inventors: Zhenyu LU, Lidong Song, Yongna Li, Feng Pan, Steve Weiyi Yang, Wenguang Shi
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Patent number: 10910397Abstract: Embodiments of through array contact structures of a 3D memory device and fabricating method thereof are disclosed. The 3D NAND memory device includes an alternating layer stack disposed on a substrate. The alternating layer stack includes a first region including an alternating dielectric stack, and a second region including an alternating conductor/dielectric stack. The memory device further comprises a barrier structure extending vertically through the alternating layer stack to laterally separate the first region from the second region, and multiple through array contacts in the first region each extending vertically through the alternating dielectric stack. At least one through array contact is electrically connected with a peripheral circuit.Type: GrantFiled: December 26, 2019Date of Patent: February 2, 2021Assignee: Yangtze Memory Technologies Co., Ltd.Inventors: Zhenyu Lu, Wenguang Shi, Guanping Wu, Xianjin Wan, Baoyou Chen
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Patent number: 10886291Abstract: Joint opening structures of 3D memory devices and fabricating method are provided. A joint opening structure comprises a first through hole penetrating a first stacked layer and a first insulating connection layer, a first channel structure at the bottom of the first through hole, a first functional layer on the sidewall of the first through hole, a second channel structure on the sidewall of the first functional layer, a third channel structure over the first through hole, a second stacked layer on the third channel structure, a second insulating connection layer on the second stacked layer, a second through hole penetrating the second stacked layer and the second insulating connection layer, a second functional layer disposed on the sidewall of the second through hole, a fourth channel structure on the sidewall of the second functional layer, and a fifth channel structure over the second through hole.Type: GrantFiled: July 26, 2018Date of Patent: January 5, 2021Assignee: Yangtze Memory Technologies Co., Ltd.Inventors: Zhenyu Lu, Wenguang Shi, Guanping Wu, Feng Pan, Xianjin Wan, Baoyou Chen
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Patent number: 10847531Abstract: Embodiments of interconnect structures of a three-dimensional (3D) memory device and method for forming the interconnect structures are disclosed. In an example, a 3D NAND memory device includes a substrate, an alternating layer stack including a staircase structure on the substrate, and a barrier structure extending vertically through the alternating layer stack. The alternating layer stack includes an alternating dielectric stack and an alternating conductor/dielectric stack. The alternating dielectric stack includes dielectric layer pairs enclosed by at least the barrier structure. The alternating conductor/dielectric stack includes conductor/dielectric layer pairs. The memory device further includes a channel structure and a slit structure each extending vertically through the alternating conductor/dielectric stack, an etch stop layer on an end of the channel structure, and first contacts.Type: GrantFiled: July 26, 2018Date of Patent: November 24, 2020Assignee: Yangtze Memory Technologies Co., Ltd.Inventors: Zhenyu Lu, Lidong Song, Yongna Li, Feng Pan, Steve Weiyi Yang, Wenguang Shi