Patents by Inventor Wen-Hua Huang

Wen-Hua Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967546
    Abstract: A semiconductor structure includes a first interposer; a second interposer laterally adjacent to the first interposer, where the second interposer is spaced apart from the first interposer; and a first die attached to a first side of the first interposer and attached to a first side of the second interposer, where the first side of the first interposer and the first side of the second interposer face the first die.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shang-Yun Hou, Hsien-Pin Hu, Sao-Ling Chiu, Wen-Hsin Wei, Ping-Kang Huang, Chih-Ta Shen, Szu-Wei Lu, Ying-Ching Shih, Wen-Chih Chiou, Chi-Hsi Wu, Chen-Hua Yu
  • Publication number: 20240079758
    Abstract: An electronic device includes a metal back cover, a metal frame, and a first, second, third, and fourth radiators. The metal frame includes a discrete part and two connection parts. The connection parts are located by two sides of the discrete part, separated from the discrete part, and connected to the metal back cover. A U-shaped slot is formed between the discrete part and the metal back cover and between the discrete part and the connection parts. The first radiator is separated from the discrete part and includes a feed end. The second, third, and fourth radiators are connected to the discrete part and the metal back cover. The third radiator is located between the first and second radiators. The first radiator is located between the third and fourth radiators. The discrete part and the first, second, third, and fourth radiators form an antenna module together.
    Type: Application
    Filed: August 2, 2023
    Publication date: March 7, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Chih-Wei Liao, Hau Yuen Tan, Shih-Keng Huang, Wen-Hgin Chuang, Lin-Hsu Chiang, Chang-Hua Wu, Han-Wei Wang, Chun-Jung Hu
  • Publication number: 20240071965
    Abstract: A package includes a first package component including a semiconductor die, wherein the semiconductor die includes conductive pads, wherein the semiconductor die is surrounded by an encapsulant; an adaptive interconnect structure on the semiconductor die, wherein the adaptive interconnect structure includes conductive lines, wherein each conductive line physically and electrically contacts a respective conductive pad; and first bond pads, wherein each first bond pad physically and electrically contacts a respective conductive line; and a second package component including an interconnect structure, wherein the interconnect structure includes second bond pads, wherein each second bond pad is directly bonded to a respective first bond pad, wherein each second bond pad is laterally offset from a corresponding conductive pad which is electrically coupled to that second bond pad.
    Type: Application
    Filed: August 29, 2022
    Publication date: February 29, 2024
    Inventors: Tung-Liang Shao, Yu-Sheng Huang, Wen-Hao Cheng, Chen-Hua Yu
  • Patent number: 11914432
    Abstract: A portable electronic device including a first body, a second body, a pivot element, a heat source, a first flexible heat conductive element, and a flip cover is provided. The pivot element is connected to the second body, and the second body is pivotally connected to the first body through the pivot element. The heat source is disposed in the first body. The first flexible heat conductive element is thermally coupled to the heat source and extends toward the pivot element from the heat source. The first flexible heat conductive element passes through the pivot element and extends into the inside of the second body and is thus thermally coupled to the second body. The flip cover is pivotally connected to the first body and located on a moving path of the pivot element.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: February 27, 2024
    Assignee: Acer Incorporated
    Inventors: Chun-Chieh Wang, Wen-Neng Liao, Cheng-Wen Hsieh, Chuan-Hua Wang, Yi-Ta Huang
  • Publication number: 20090068301
    Abstract: A protection structure for an optical lens module includes a female die, a male die, and an ejector plate. The male die includes a plurality of cores and second cavities. Locating rings are provided on the cores or in the second cavities to protect the cores from tearing and wearing so as to extend their lifespan.
    Type: Application
    Filed: September 7, 2007
    Publication date: March 12, 2009
    Inventor: Wen-Hua Huang
  • Patent number: 7247909
    Abstract: A method is disclosed for integrally forming at least one low voltage device and at least one high voltage device. According to the method, a first gate structure and a second gate structure are formed on a semiconductor substrate, wherein the first and second gate structures are isolated from one another. One or more first double diffused regions are formed adjacent to the first gate structure in the semiconductor substrate. One or more second double diffused regions are formed adjacent to the second gate structure in the semiconductor substrate. One or more first source/drain regions are formed within the first double diffused regions. One or more second source/drain regions are formed within the second double diffused regions. The first double diffused regions function as one or more lightly doped source/drain regions for the low voltage device.
    Type: Grant
    Filed: November 10, 2005
    Date of Patent: July 24, 2007
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fu-Hsin Chen, Wen-Hua Huang, Kuo-Ting Lee, You-Kuo Wu, An-Min Chiang
  • Publication number: 20070102759
    Abstract: A method is disclosed for integrally forming at least one low voltage device and at least one high voltage device. According to the method, a first gate structure and a second gate structure are formed on a semiconductor substrate, wherein the first and second gate structures are isolated from one another. One or more first double diffused regions are formed adjacent to the first gate structure in the semiconductor substrate. One or more second double diffused regions are formed adjacent to the second gate structure in the semiconductor substrate. One or more first source/drain regions are formed within the first double diffused regions. One or more second source/drain regions are formed within the second double diffused regions. The first double diffused regions function as one or more lightly doped source/drain regions for the low voltage device.
    Type: Application
    Filed: November 10, 2005
    Publication date: May 10, 2007
    Inventors: Fu-Hsin Chen, Wen-Hua Huang, Kuo-Ting Lee, You-Kuo Wu, An-Ming Chiang
  • Patent number: 5767385
    Abstract: An automated forced-choice dynamic-dilution olfactometer has an odor evaluation module having two or more panelist stations, with a plurality of sniffing ports at each station. At least one signal element at each station is connected to a data control unit. Separate air lines are connected to one each of the sniffing ports at each station. One of the air lines has an odor introduction port.
    Type: Grant
    Filed: February 5, 1997
    Date of Patent: June 16, 1998
    Assignee: Iowa State University Research Foundation, Inc.
    Inventors: Dwaine S. Bundy, Wen-Hua Huang, Steven J. Hoff, Qianbao Liu, Xiwei Li