Patents by Inventor Wen-Hua Huang

Wen-Hua Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12222383
    Abstract: An insulation resistance detection circuit is coupled to a positive end and a negative end of a DC power source, and is used to detect a positive insulation resistance between the positive end and a ground point and detect a negative insulation resistance between the negative end and the ground point. A detection unit sets a first estimated resistance and a second estimated resistance, and acquires a first voltage based on turning on the switch and acquires a second voltage based on turning off the switch. The detection unit calculates a third voltage and a fourth voltage according to the first estimated resistance and the second estimated resistance so as to detect the positive insulation resistance and the negative insulation resistance when the third voltage is equal to the first voltage and the fourth voltage is equal to the second voltage.
    Type: Grant
    Filed: April 17, 2024
    Date of Patent: February 11, 2025
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Li-Ching Yang, Wen-Lung Huang, Sheng-Hua Li
  • Publication number: 20250030347
    Abstract: A power apparatus applied in a solid state transformer structure includes an AC-to-DC conversion unit, a first DC bus, and a plurality of bi-directional DC conversion units. First sides of the bi-directional DC conversion units are coupled to the first DC bus. Second sides of the bi-directional DC conversion units are configured to form at least one second DC bus, and the number of the at least one second DC bus is a bus number. The bi-directional DC conversion units receive a bus voltage of the first DC bus and convert the bus voltage into at least one DC voltage, or the bi-directional DC conversion units receive at least one external DC voltage and convert the at least one external DC voltage into the bus voltage.
    Type: Application
    Filed: October 3, 2024
    Publication date: January 23, 2025
    Inventors: Sheng-Hua LI, Wen-Lung HUANG
  • Publication number: 20090068301
    Abstract: A protection structure for an optical lens module includes a female die, a male die, and an ejector plate. The male die includes a plurality of cores and second cavities. Locating rings are provided on the cores or in the second cavities to protect the cores from tearing and wearing so as to extend their lifespan.
    Type: Application
    Filed: September 7, 2007
    Publication date: March 12, 2009
    Inventor: Wen-Hua Huang
  • Patent number: 7247909
    Abstract: A method is disclosed for integrally forming at least one low voltage device and at least one high voltage device. According to the method, a first gate structure and a second gate structure are formed on a semiconductor substrate, wherein the first and second gate structures are isolated from one another. One or more first double diffused regions are formed adjacent to the first gate structure in the semiconductor substrate. One or more second double diffused regions are formed adjacent to the second gate structure in the semiconductor substrate. One or more first source/drain regions are formed within the first double diffused regions. One or more second source/drain regions are formed within the second double diffused regions. The first double diffused regions function as one or more lightly doped source/drain regions for the low voltage device.
    Type: Grant
    Filed: November 10, 2005
    Date of Patent: July 24, 2007
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fu-Hsin Chen, Wen-Hua Huang, Kuo-Ting Lee, You-Kuo Wu, An-Min Chiang
  • Publication number: 20070102759
    Abstract: A method is disclosed for integrally forming at least one low voltage device and at least one high voltage device. According to the method, a first gate structure and a second gate structure are formed on a semiconductor substrate, wherein the first and second gate structures are isolated from one another. One or more first double diffused regions are formed adjacent to the first gate structure in the semiconductor substrate. One or more second double diffused regions are formed adjacent to the second gate structure in the semiconductor substrate. One or more first source/drain regions are formed within the first double diffused regions. One or more second source/drain regions are formed within the second double diffused regions. The first double diffused regions function as one or more lightly doped source/drain regions for the low voltage device.
    Type: Application
    Filed: November 10, 2005
    Publication date: May 10, 2007
    Inventors: Fu-Hsin Chen, Wen-Hua Huang, Kuo-Ting Lee, You-Kuo Wu, An-Ming Chiang
  • Patent number: 5767385
    Abstract: An automated forced-choice dynamic-dilution olfactometer has an odor evaluation module having two or more panelist stations, with a plurality of sniffing ports at each station. At least one signal element at each station is connected to a data control unit. Separate air lines are connected to one each of the sniffing ports at each station. One of the air lines has an odor introduction port.
    Type: Grant
    Filed: February 5, 1997
    Date of Patent: June 16, 1998
    Assignee: Iowa State University Research Foundation, Inc.
    Inventors: Dwaine S. Bundy, Wen-Hua Huang, Steven J. Hoff, Qianbao Liu, Xiwei Li