Patents by Inventor Wenjing Liang

Wenjing Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11789221
    Abstract: An optical sub-assembly includes a diode submount structure, a diode mounted to the diode submount, and a thermoelectric cooler (TEC). The TEC is in thermal contact with the diode, and the diode is positioned between the diode submount structure and the TEC.
    Type: Grant
    Filed: October 5, 2021
    Date of Patent: October 17, 2023
    Assignee: Aeva, Inc.
    Inventors: Zhizhong Tang, Wenjing Liang, Kevin Kinichi Masuda, Pradeep Srinivasan
  • Publication number: 20230327395
    Abstract: Embodiments of the present disclosure include method for sequentially mounting multiple semiconductor devices onto a substrate having a composite metal structure on both the semiconductor devices and the substrate for improved process tolerance and reduced device distances without thermal interference. The mounting process causes “selective” intermixing between the metal layers on the devices and the substrate and increases the melting point of the resulting alloy materials.
    Type: Application
    Filed: June 16, 2023
    Publication date: October 12, 2023
    Inventors: Zhizhong Tang, Pradeep Srinivasan, Kevin Masuda, Wenjing Liang
  • Publication number: 20230305245
    Abstract: A method of cooling an optical sub-assembly includes operating a diode mounted to a diode submount structure and cooling the diode with a thermoelectric cooler (TEC) in thermal contact with the diode, wherein the diode is positioned between the diode submount structure and the TEC.
    Type: Application
    Filed: May 22, 2023
    Publication date: September 28, 2023
    Inventors: Zhizhong TANG, Wenjing LIANG, Kevin Kinichi MASUDA, Pradeep SRINIVASAN
  • Patent number: 11715929
    Abstract: Embodiments of the present disclosure include method for sequentially mounting multiple semiconductor devices onto a substrate having a composite metal structure on both the semiconductor devices and the substrate for improved process tolerance and reduced device distances without thermal interference. The mounting process causes “selective” intermixing between the metal layers on the devices and the substrate and increases the melting point of the resulting alloy materials.
    Type: Grant
    Filed: May 2, 2022
    Date of Patent: August 1, 2023
    Assignee: Aeva, Inc.
    Inventors: Zhizhong Tang, Pradeep Srinivasan, Kevin Masuda, Wenjing Liang
  • Publication number: 20230123042
    Abstract: Embodiments of the present disclosure include method for sequentially mounting multiple semiconductor devices onto a substrate having a composite metal structure on both the semiconductor devices and the substrate for improved process tolerance and reduced device distances without thermal interference. The mounting process causes “selective” intermixing between the metal layers on the devices and the substrate and increases the melting point of the resulting alloy materials.
    Type: Application
    Filed: May 2, 2022
    Publication date: April 20, 2023
    Inventors: Zhizhong Tang, Pradeep Srinivasan, Kevin Masuda, Wenjing Liang
  • Publication number: 20230103569
    Abstract: An optical sub-assembly includes a diode submount structure, a diode mounted to the diode submount, and a thermoelectric cooler (TEC). The TEC is in thermal contact with the diode, and the diode is positioned between the diode submount structure and the TEC.
    Type: Application
    Filed: October 5, 2021
    Publication date: April 6, 2023
    Applicant: AEVA, INC.
    Inventors: Zhizhong Tang, Wenjing Liang, Kevin Kinichi Masuda, Pradeep Srinivasan
  • Patent number: 11362485
    Abstract: Embodiments of the present disclosure include method for sequentially mounting multiple semiconductor devices onto a substrate having a composite metal structure on both the semiconductor devices and the substrate for improved process tolerance and reduced device distances without thermal interference. The mounting process causes “selective” intermixing between the metal layers on the devices and the substrate and increases the melting point of the resulting alloy materials.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: June 14, 2022
    Assignee: Aeva, Inc.
    Inventors: Zhizhong Tang, Pradeep Srinivasan, Kevin Masuda, Wenjing Liang