Patents by Inventor Wenjing Lu
Wenjing Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240128897Abstract: A power tool includes: a motor including a rotor and multiple phases of stator windings; and a control circuit configured to control the working state of the motor. The control circuit includes: a driver circuit including multiple switching elements; a controller electrically connected to at least the driver circuit and capable of outputting a control signal to change the conducting states of the multiple switching elements in the driver circuit; and a parameter detection module configured to detect a working parameter of the motor. In response to a braking signal, the controller sets an input parameter of the control circuit according to a preset parameter and the working parameter to control output power of the motor and/or output torque of the motor, thereby controlling the motor to brake.Type: ApplicationFiled: June 21, 2023Publication date: April 18, 2024Inventors: Wenjing Lu, Yanqing Xu, Guang Li
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Patent number: 11736138Abstract: A digital up-converter (DUC) includes conjugate-mixer-combiner. The conjugate-mixer-combiner includes a pre-combiner configured to generate combinations of a first in-phase (I) value to be transmitted at a first frequency of a first frequency band, a first quadrature (Q) value to be transmitted at the first frequency of a first frequency band, a second I value for to be transmitted at a second frequency of a second frequency band, and a second Q value to be transmitted at the second frequency of a second frequency band. The conjugate-mixer-combiner further includes a plurality of multipliers collectively configured to shift the combinations based on an average difference between the first frequency and the second frequency.Type: GrantFiled: October 5, 2021Date of Patent: August 22, 2023Assignee: Texas Instruments IncorporatedInventors: Sriram Murali, Jaiganesh Balakrishnan, Pooja Sundar, Harshavardhan Adepu, Wenjing Lu, Yeswanth Guntupalli
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Patent number: 11356125Abstract: An integrated circuit comprises an input, a digital step attenuator, an analog-to-digital converter, a first output, a second output, a first bandwidth filter, a first band attack detector, a first band decay detector, a second bandwidth filter, a second band attack detector, a second band decay detector, and an automatic gain control. The ADC is configured to output a digital signal including a first and a second frequency range. The first and second bandwidth filters are configured to extract respective digital signals comprising the first and second frequency ranges. The band attack and decay detectors are configured to detect band peaks or decays thereof such that the DSA and External AMP may be controlled by means of the AGC based on the detected band peaks or decays, and ADC attack and ADC decay.Type: GrantFiled: November 20, 2020Date of Patent: June 7, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Jawaharlal Tangudu, Yeswanth Guntupalli, Kalyan Gudipati, Robert Clair Keller, Wenjing Lu, Jaiganesh Balakrishnan, Harsh Garg, Bragadeesh S, Raju Kharataram Chaudhari, Francesco Dantoni
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Publication number: 20220141312Abstract: Systems, apparatuses, and methods are described for generating unique identifiers. Identifiers may be organized or grouped by different topics. Identifiers may be requested, generated, stored as groups, and may be allocated from those groups based on requests for identifiers to improve the efficiency of one or more computing devices or systems. The size of each group of identifiers may be adjusted.Type: ApplicationFiled: February 5, 2021Publication date: May 5, 2022Inventors: Yu Cao, Qiang Wang, Wenjing Lu, Ruofei Ma, Fan Yang
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Publication number: 20220029657Abstract: A digital up-converter (DUC) includes conjugate-mixer-combiner. The conjugate-mixer-combiner includes a pre-combiner configured to generate combinations of a first in-phase (I) value to be transmitted at a first frequency of a first frequency band, a first quadrature (Q) value to be transmitted at the first frequency of a first frequency band, a second I value for to be transmitted at a second frequency of a second frequency band, and a second Q value to be transmitted at the second frequency of a second frequency band. The conjugate-mixer-combiner further includes a plurality of multipliers collectively configured to shift the combinations based on an average difference between the first frequency and the second frequency.Type: ApplicationFiled: October 5, 2021Publication date: January 27, 2022Inventors: Sriram MURALI, Jaiganesh BALAKRISHNAN, Pooja SUNDAR, Harshavardhan ADEPU, Wenjing LU, Yeswanth GUNTUPALLI
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Patent number: 11171681Abstract: A digital up-converter (DUC) includes conjugate-mixer-combiner. The conjugate-mixer-combiner includes a pre-combiner configured to generate combinations of a first in-phase (I) value to be transmitted at a first frequency of a first frequency band, a first quadrature (Q) value to be transmitted at the first frequency of a first frequency band, a second I value for to be transmitted at a second frequency of a second frequency band, and a second Q value to be transmitted at the second frequency of a second frequency band. The conjugate-mixer-combiner further includes a plurality of multipliers collectively configured to shift the combinations based on an average difference between the first frequency and the second frequency.Type: GrantFiled: October 16, 2020Date of Patent: November 9, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Sriram Murali, Jaiganesh Balakrishnan, Pooja Sundar, Harshavardhan Adepu, Wenjing Lu, Yeswanth Guntupalli
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Publication number: 20210159924Abstract: An integrated circuit comprises an input, a digital step attenuator, an analog-to-digital converter, a first output, a second output, a first bandwidth filter, a first band attack detector, a first band decay detector, a second bandwidth filter, a second band attack detector, a second band decay detector, and an automatic gain control. The ADC is configured to output a digital signal including a first and a second frequency range. The first and second bandwidth filters are configured to extract respective digital signals comprising the first and second frequency ranges. The band attack and decay detectors are configured to detect band peaks or decays thereof such that the DSA and External AMP may be controlled by means of the AGC based on the detected band peaks or decays, and ADC attack and ADC decay.Type: ApplicationFiled: November 20, 2020Publication date: May 27, 2021Inventors: Jawaharlal Tangudu, Yeswanth Guntupalli, Kalyan Gudipati, Robert Clair Keller, Wenjing Lu, Jaiganesh Balakrishnan, Harsh Garg, Bragadeesh S, Raju Kharataram Chaudhari, Francesco Dantoni
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Publication number: 20210119661Abstract: A digital up-converter (DUC) includes conjugate-mixer-combiner. The conjugate-mixer-combiner includes a pre-combiner configured to generate combinations of a first in-phase (I) value to be transmitted at a first frequency of a first frequency band, a first quadrature (Q) value to be transmitted at the first frequency of a first frequency band, a second I value for to be transmitted at a second frequency of a second frequency band, and a second Q value to be transmitted at the second frequency of a second frequency band. The conjugate-mixer-combiner further includes a plurality of multipliers collectively configured to shift the combinations based on an average difference between the first frequency and the second frequency.Type: ApplicationFiled: October 16, 2020Publication date: April 22, 2021Inventors: Sriram MURALI, Jaiganesh BALAKRISHNAN, Pooja SUNDAR, Harshavardhan ADEPU, Wenjing LU, Yeswanth GUNTUPALLI
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Patent number: 10187071Abstract: A PLL including a VCO with a variable capacitance (such as an LC VCO) including a switched capacitor bank and a varactor, the PLL providing lock range extension over temperature using dynamic capacitor bank switching to dynamically adjust varactor set point based on junction temperature. The varactor is responsive to the Vctrl control voltage to adjust a capacitance of the variable capacitance to control the phase of the PLL signal. Compensation circuitry dynamically adjusts varactor set point by dynamically switching the capacitor bank based in a junction temperature associated with the PLL circuitry, thereby extending PLL lock range over temperature.Type: GrantFiled: December 21, 2016Date of Patent: January 22, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Himanshu Arora, Siraj Akhtar, Lu Sun, Hamid Safiri, Wenjing Lu, Nikolaus Klemmer
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Publication number: 20170264302Abstract: A multi-ladder DAC includes first and second resistor ladders, with a switch-interconnect. The switch-interconnect includes a second set of switches connected between each node of the first ladder and the top and bottom tap points of the second ladder. All other second ladder tap points are part of a loop tied to the nodes above and below each resistor through a second set of switches. Because no current flows through the switches that tie the top and bottom second-ladder tap points to the nodes of the first ladder, avoiding IRswitch error, thereby improving DNL.Type: ApplicationFiled: December 21, 2016Publication date: September 14, 2017Inventors: Himanshu Arora, Siraj Akhtar, Lu Sun, Hamid Safiri, Wenjing Lu, Nikolaus Klemmer