Abstract: A rapid monitoring and identification method for winter wheat drought levels includes: 1) obtaining multispectral images and ground-measured LAI through UAV-based multi-payload low-altitude remote sensing technology, and calculating vegetation indices such as Normalized Difference Vegetation Index (NDVI), Difference Vegetation Index (DVI), Ratio Vegetation Index (RVI), Enhanced Vegetation Index (EVI), Optimized soil adjusted vegetation index (OSAVI) and Transformed Chlorophyll Absorption Reflectance Index; 2) establishing regression equations between the calculated vegetation indices and measured LAI for different growth stages, and selecting the optimal model equation for each growth stage; 3) using the optimal model equation to invert the LAI of winter wheat at various growth stages, and calibrating the LAI thresholds for different drought stress levels; 4) acquiring the multispectral images of target plot through real-time monitoring, calculating the required vegetation indices, inverting to obtain the LAI

Abstract: A rapid monitoring and discrimination method for drought conditions in summer maize based on chlorophyll content includes: 1) Obtaining multi-spectral imagery through UAV multi-payload low-altitude remote sensing technology and measuring chlorophyll content on the ground. Additionally, calculating vegetation indices including Normalized Difference Vegetation Index (NDVI), Soil-Adjusted Vegetation Index (SAVI), and Renormalized Difference Vegetation Index (RENDVI). 2) Selecting vegetation indices and constructing regression equations with measured chlorophyll content during different growth stages. The regression equation with the highest correlation for each growth stage is chosen as the optimal model equation for that particular stage. 3) Using the optimal model equations to retrieve chlorophyll content for each period and determining thresholds for chlorophyll content across different drought levels through calibration.

Abstract: Systems, apparatuses, and methods are described for generating unique identifiers. Identifiers may be organized or grouped by different topics. Identifiers may be requested, generated, stored as groups, and may be allocated from those groups based on requests for identifiers to improve the efficiency of one or more computing devices or systems. The size of each group of identifiers may be adjusted.

Abstract: A power tool includes a mounting portion for optionally mounting one working accessory of multiple working accessories; a motor configured to drive the working accessory mounted on the mounting portion; and a control device configured to control rotation of the motor according to a target control program matching the working accessory. The control device is configured to, when the motor is in a pre-starting stage, estimate rotational inertia of the motor and identify the working accessory currently mounted to the mounting portion based on the rotational inertia.

Abstract: Systems, apparatuses, and methods are described for generating unique identifiers. Identifiers may be organized or grouped by different topics. Identifiers may be requested, generated, stored as groups, and may be allocated from those groups based on requests for identifiers to improve the efficiency of one or more computing devices or systems. The size of each group of identifiers may be adjusted.

Abstract: A power tool includes: a motor including a rotor and multiple phases of stator windings; and a control circuit configured to control the working state of the motor. The control circuit includes: a driver circuit including multiple switching elements; a controller electrically connected to at least the driver circuit and capable of outputting a control signal to change the conducting states of the multiple switching elements in the driver circuit; and a parameter detection module configured to detect a working parameter of the motor. In response to a braking signal, the controller sets an input parameter of the control circuit according to a preset parameter and the working parameter to control output power of the motor and/or output torque of the motor, thereby controlling the motor to brake.

Abstract: A digital up-converter (DUC) includes conjugate-mixer-combiner. The conjugate-mixer-combiner includes a pre-combiner configured to generate combinations of a first in-phase (I) value to be transmitted at a first frequency of a first frequency band, a first quadrature (Q) value to be transmitted at the first frequency of a first frequency band, a second I value for to be transmitted at a second frequency of a second frequency band, and a second Q value to be transmitted at the second frequency of a second frequency band. The conjugate-mixer-combiner further includes a plurality of multipliers collectively configured to shift the combinations based on an average difference between the first frequency and the second frequency.

Abstract: An integrated circuit comprises an input, a digital step attenuator, an analog-to-digital converter, a first output, a second output, a first bandwidth filter, a first band attack detector, a first band decay detector, a second bandwidth filter, a second band attack detector, a second band decay detector, and an automatic gain control. The ADC is configured to output a digital signal including a first and a second frequency range. The first and second bandwidth filters are configured to extract respective digital signals comprising the first and second frequency ranges. The band attack and decay detectors are configured to detect band peaks or decays thereof such that the DSA and External AMP may be controlled by means of the AGC based on the detected band peaks or decays, and ADC attack and ADC decay.

Abstract: Systems, apparatuses, and methods are described for generating unique identifiers. Identifiers may be organized or grouped by different topics. Identifiers may be requested, generated, stored as groups, and may be allocated from those groups based on requests for identifiers to improve the efficiency of one or more computing devices or systems. The size of each group of identifiers may be adjusted.

Abstract: A digital up-converter (DUC) includes conjugate-mixer-combiner. The conjugate-mixer-combiner includes a pre-combiner configured to generate combinations of a first in-phase (I) value to be transmitted at a first frequency of a first frequency band, a first quadrature (Q) value to be transmitted at the first frequency of a first frequency band, a second I value for to be transmitted at a second frequency of a second frequency band, and a second Q value to be transmitted at the second frequency of a second frequency band. The conjugate-mixer-combiner further includes a plurality of multipliers collectively configured to shift the combinations based on an average difference between the first frequency and the second frequency.

Abstract: A digital up-converter (DUC) includes conjugate-mixer-combiner. The conjugate-mixer-combiner includes a pre-combiner configured to generate combinations of a first in-phase (I) value to be transmitted at a first frequency of a first frequency band, a first quadrature (Q) value to be transmitted at the first frequency of a first frequency band, a second I value for to be transmitted at a second frequency of a second frequency band, and a second Q value to be transmitted at the second frequency of a second frequency band. The conjugate-mixer-combiner further includes a plurality of multipliers collectively configured to shift the combinations based on an average difference between the first frequency and the second frequency.

Abstract: An integrated circuit comprises an input, a digital step attenuator, an analog-to-digital converter, a first output, a second output, a first bandwidth filter, a first band attack detector, a first band decay detector, a second bandwidth filter, a second band attack detector, a second band decay detector, and an automatic gain control. The ADC is configured to output a digital signal including a first and a second frequency range. The first and second bandwidth filters are configured to extract respective digital signals comprising the first and second frequency ranges. The band attack and decay detectors are configured to detect band peaks or decays thereof such that the DSA and External AMP may be controlled by means of the AGC based on the detected band peaks or decays, and ADC attack and ADC decay.

Abstract: A digital up-converter (DUC) includes conjugate-mixer-combiner. The conjugate-mixer-combiner includes a pre-combiner configured to generate combinations of a first in-phase (I) value to be transmitted at a first frequency of a first frequency band, a first quadrature (Q) value to be transmitted at the first frequency of a first frequency band, a second I value for to be transmitted at a second frequency of a second frequency band, and a second Q value to be transmitted at the second frequency of a second frequency band. The conjugate-mixer-combiner further includes a plurality of multipliers collectively configured to shift the combinations based on an average difference between the first frequency and the second frequency.

Abstract: A PLL including a VCO with a variable capacitance (such as an LC VCO) including a switched capacitor bank and a varactor, the PLL providing lock range extension over temperature using dynamic capacitor bank switching to dynamically adjust varactor set point based on junction temperature. The varactor is responsive to the Vctrl control voltage to adjust a capacitance of the variable capacitance to control the phase of the PLL signal. Compensation circuitry dynamically adjusts varactor set point by dynamically switching the capacitor bank based in a junction temperature associated with the PLL circuitry, thereby extending PLL lock range over temperature.

Abstract: A multi-ladder DAC includes first and second resistor ladders, with a switch-interconnect. The switch-interconnect includes a second set of switches connected between each node of the first ladder and the top and bottom tap points of the second ladder. All other second ladder tap points are part of a loop tied to the nodes above and below each resistor through a second set of switches. Because no current flows through the switches that tie the top and bottom second-ladder tap points to the nodes of the first ladder, avoiding IRswitch error, thereby improving DNL.