Patents by Inventor Wenjuan DAI

Wenjuan DAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240232287
    Abstract: The present disclosure discloses a computing apparatus configured to perform a binary operation on multi-dimensional data, and related products. The computing apparatus is included in a combined processing apparatus. The combined processing apparatus further includes an interface apparatus and other processing apparatus. The computing apparatus interacts with other processing apparatus to jointly complete a computing operation specified by a user. The combined processing apparatus further includes a storage apparatus. The storage apparatus is connected to the computing apparatus and other processing apparatus respectively and is configured to store data of the computing apparatus and other processing apparatus. The disclosed scheme may reduce the number of data exchange and loading, relieve throughput pressure, and improve processing efficiency of a machine by rationally allocating the loading frequency of operation data.
    Type: Application
    Filed: March 25, 2024
    Publication date: July 11, 2024
    Applicant: CAMBRICON TECHNOLOGIES CORPORATION LIMITED
    Inventors: Zheng SUN, Liutao ZHENG, Ming LI, Wenjuan DAI, Zhenghua HU, Zhize CHEN, Yichen ZHENG
  • Publication number: 20240176984
    Abstract: The present disclosure discloses a data processing apparatus, a method, and related products. The data processing apparatus is used as a computing apparatus and is included in a combined processing apparatus. The combined processing apparatus further includes an interface apparatus and other processing apparatus. The computing apparatus interacts with other processing apparatus to jointly complete a computing operation specified by a user. The combined processing apparatus further includes a storage apparatus. The storage apparatus is respectively connected to the computing apparatus and other processing apparatus and is configured to store data of the computing apparatus and other processing apparatus. The solution of the present disclosure reduces IO time at runtime and memory requirements by means of block local rearrangement.
    Type: Application
    Filed: March 25, 2022
    Publication date: May 30, 2024
    Inventors: Xiaomeng LIU, Ming LI, Xiwen YU, Zhize CHEN, Wenjuan DAI, Qingwei HE, Le YIN, Jiangmin ZHOU
  • Publication number: 20240160689
    Abstract: A method is for optimizing a convolution operation of an on-chip system and related products. The on-chip system is included in a computing processing apparatus of a combined processing apparatus. The computing processing apparatus includes one or a plurality of integrated circuit apparatuses. The combined processing apparatus further includes an interface apparatus and other processing apparatus. The computing processing apparatus interacts with other processing apparatus to jointly complete a computing operation specified by a user. The combined processing apparatus further includes a storage apparatus. The storage apparatus is connected to the apparatus and other processing apparatus, respectively. The storage apparatus is configured to store data of the apparatus and other processing apparatus.
    Type: Application
    Filed: April 14, 2022
    Publication date: May 16, 2024
    Inventors: Zheng SUN, Ming LI, Wenjuan DAI, Zhize CHEN, Guang JIANG, Xin YU