Abstract: A method for analyzing post-assembly residual stresses in a microwave assembly, in which a three-dimensional model of the microwave assembly and a three-dimensional model of a tooling required for each high-temperature treatment are established; a finite element mesh model of the entire microwave assembly and a finite element mesh model of the tooling are established based on their respective three-dimensional models; performing simulation analysis on each high-temperature treatment process based on the finite element mesh model to obtain residual stress distribution; and superimposing the residual stress distributions of all high-temperature treatment processes to obtain a post-assembly residual stress distribution.

Abstract: A pet housing crate includes a main crate body and a first door. Sidewalls of the main crate body enclose to form a containment space for accommodating a pet, and the main crate body has a first pet access opening in communication with the containment space. The first door is connected to the main crate body, and the first door is movable between an open position and a closed position. When the first door is in the closed position, the first door covers the first pet access opening. When the first door is in the open position, the first door exposes the first pet access opening. The first door is a transparent one. This configuration enables the pet to enter the containment space through the first pet access opening, allowing the pet to rest and sleep within the containment space.

Abstract: A method for evaluating reliability of blind mating interconnection of a phased-array antenna, in which a mathematical model of the phased-array antenna is obtained by computer aided design (CAD) to calculate a blind mating clearance tolerance for each level; a non-load-bearing structure within the CAD mathematical model is simplified to establish a finite element model; load conditions are introduced for structural deformation analysis to obtain blind mating clearance variations of blind mate connectors; blind mate clearance variations of blind mate interconnections and the blind mating clearance tolerance are summed to determine whether mechanical reliability of the phased-array antenna is unqualified; if yes, the evaluation is ended; otherwise, a total blind mating clearance variation of individual blind mating connectors caused by temperature, acceleration overload, and random vibration load is calculated to determine whether electrical reliability of the phased-array antenna is qualified.

Abstract: The present disclosure relates to a ZigBee/Bluetooth dual-mode radio frequency transceiver architecture, in which, a dual-mode baseband and firmware determines hardware parameter of a receiving module or sending module based on a first mode or a second mode; a radio frequency front-end module is used for receiving or sending a first mode signal or a second mode signal; a receiving module is used for converting the first mode signal received by the radio frequency front-end module into a first mode baseband digital signal, or converting the second mode signal received by the radio frequency front-end module into a second mode baseband digital signal and outputting the first mode baseband digital signal or the second mode baseband digital signal to the dual-mode baseband and firmware; a sending module is used for converting the first mode baseband digital signal outputted by dual-mode baseband and firmware into the first mode signal.

Abstract: The present disclosure relates to a ZigBee/Bluetooth dual-mode radio frequency transceiver architecture, in which, a dual-mode baseband and firmware determines hardware parameter of a receiving module or sending module based on a first mode or a second mode; a radio frequency front-end module is used for receiving or sending a first mode signal or a second mode signal; a receiving module is used for converting the first mode signal received by the radio frequency front-end module into a first mode baseband digital signal, or converting the second mode signal received by the radio frequency front-end module into a second mode baseband digital signal and outputting the first mode baseband digital signal or the second mode baseband digital signal to the dual-mode baseband and firmware; a sending module is used for converting the first mode baseband digital signal outputted by dual-mode baseband and firmware into the first mode signal.

Abstract: An undervoltage detection circuit includes a first transistor and a second transistor coupled to a supply voltage node and arranged to form a current mirror. The undervoltage detection circuit also includes a first bipolar transistor and a second bipolar transistor. A collector of the first bipolar transistor is coupled to the first transistor, and an emitter of the first bipolar transistor is coupled to a reference voltage node. A collector of the second bipolar transistor is coupled to the second transistor and an emitter of the second bipolar transistor is coupled to the reference voltage node through a first resistor. The undervoltage detection circuit further includes a third transistor coupled through a second resistor to an input voltage node. An output signal indicative of an input voltage is derived from a voltage established at the collector of the second bipolar transistor.

Abstract: An apparatus includes an oscillator circuit that includes terminals to couple a second circuit having an impedance to the oscillator circuit. The apparatus includes a third circuit that is coupled to at least one of the terminals to isolate a leakage current from at least part of the oscillator circuit.

Abstract: An undervoltage detection circuit includes a first transistor and a second transistor coupled to a supply voltage node and arranged to form a current mirror. The undervoltage detection circuit also includes a first bipolar transistor and a second bipolar transistor. A collector of the first bipolar transistor is coupled to the first transistor, and an emitter of the first bipolar transistor is coupled to a reference voltage node. A collector of the second bipolar transistor is coupled to the second transistor and an emitter of the second bipolar transistor is coupled to the reference voltage node through a first resistor. The undervoltage detection circuit further includes a third transistor coupled through a second resistor to an input voltage node. An output signal indicative of an input voltage is derived from a voltage established at the collector of the second bipolar transistor.

Abstract: An apparatus includes an oscillator circuit that includes terminals to couple a second circuit having an impedance to the oscillator circuit. The apparatus includes a third circuit that is coupled to at least one of the terminals to isolate a leakage current from at least part of the oscillator circuit.