Abstract: Current sensing in an on-die direct current-direct current (DC-DC) converter for measuring delivered power is disclosed. A DC-DC converter converts input voltage to output current at an output voltage coupled to a load circuit. The DC-DC converter includes a high side driver (HSD) circuit to drive the output current in a first stage, and a low side driver (LSD) circuit to couple the power output to a negative supply rail (GND) in a second phase, output current being periodic. The DC-DC converter includes an amplifier circuit to equalize an output voltage and a mirror voltage. Based on the mirror voltage, the current sensing circuit generates mirror current that corresponds to driver current. The mirror current can be measured as a representation of the output current delivered to the load circuit. A plurality of the DC-DC converters can provide multi-phased current to the load circuit for providing power to the load circuit.

Abstract: Current sensing in an on-die direct current-direct current (DC-DC) converter for measuring delivered power is disclosed. A DC-DC converter converts input voltage to output current at an output voltage coupled to a load circuit. The DC-DC converter includes a high side driver (HSD) circuit to drive the output current in a first stage, and a low side driver (LSD) circuit to couple the power output to a negative supply rail (GND) in a second phase, output current being periodic. The DC-DC converter includes an amplifier circuit to equalize an output voltage and a mirror voltage. Based on the mirror voltage, the current sensing circuit generates mirror current that corresponds to driver current. The mirror current can be measured as a representation of the output current delivered to the load circuit. A plurality of the DC-DC converters can provide multi-phased current to the load circuit for providing power to the load circuit.

Abstract: Current sensing in an on-die direct current-direct current (DC-DC) converter for measuring delivered power is disclosed. A DC-DC converter converts input voltage to output current at an output voltage coupled to a load circuit. The DC-DC converter includes a high side driver (HSD) circuit to drive the output current in a first stage, and a low side driver (LSD) circuit to couple the power output to a negative supply rail (GND) in a second phase, output current being periodic. The DC-DC converter includes an amplifier circuit to equalize an output voltage and a mirror voltage. Based on the mirror voltage, the current sensing circuit generates mirror current that corresponds to driver current. The mirror current can be measured as a representation of the output current delivered to the load circuit. A plurality of the DC-DC converters can provide multi-phased current to the load circuit for providing power to the load circuit.

Abstract: Current sensing in an on-die direct current-direct current (DC-DC) converter for measuring delivered power is disclosed. A DC-DC converter converts input voltage to output current at an output voltage coupled to a load circuit. The DC-DC converter includes a high side driver (HSD) circuit to drive the output current in a first stage, and a low side driver (LSD) circuit to couple the power output to a negative supply rail (GND) in a second phase, output current being periodic. The DC-DC converter includes an amplifier circuit to equalize an output voltage and a mirror voltage. Based on the mirror voltage, the current sensing circuit generates mirror current that corresponds to driver current. The mirror current can be measured as a representation of the output current delivered to the load circuit. A plurality of the DC-DC converters can provide multi-phased current to the load circuit for providing power to the load circuit.

Abstract: Certain aspects of the present disclosure are directed to a multi-phase voltage converter. The multi-phase voltage converter generally includes at least two converter stages coupled to an output node of the multi-phase voltage converter. Each of the at least two converter stages generally includes a switch disposed between an input node of the multi-phase voltage converter and the output node, the switch having a first resistance, and an inductive element coupled between the switch and the output node, the inductive element having a second resistance. In certain aspects, the first resistances of the at least two converter stages match and/or the second resistances of the at least two converter stages match.

Abstract: Described herein are a method and an apparatus for minimizing within-die variations in performance parameters of a processor. The apparatus comprising: a reference generator to generate an adjustable compensated reference signal; a bias generator to generate a bias signal based on the adjustable compensated reference signal; a transmitter coupled with the bias generator to transmit an output signal; and a feedback mechanism to sample the output signal from the transmitter and to provide the sampled output signal to the bias generator.

Abstract: Described herein are a method and an apparatus for minimizing within-die variations in performance parameters of a processor. The apparatus comprising: a reference generator to generate an adjustable compensated reference signal; a bias generator to generate a bias signal based on the adjustable compensated reference signal; a transmitter coupled with the bias generator to transmit an output signal; and a feedback mechanism to sample the output signal from the transmitter and to provide the sampled output signal to the bias generator.

Abstract: Described herein are a method and an apparatus for minimizing within-die variations in performance parameters of a processor. The apparatus comprising: a reference generator to generate an adjustable compensated reference signal; a bias generator to generate a bias signal based on the adjustable compensated reference signal; a transmitter coupled with the bias generator to transmit an output signal; and a feedback mechanism to sample the output signal from the transmitter and to provide the sampled output signal to the bias generator.

Abstract: Described herein are a method and an apparatus for minimizing within-die variations in performance parameters of a processor. The apparatus comprising: a reference generator to generate an adjustable compensated reference signal; a bias generator to generate a bias signal based on the adjustable compensated reference signal; a transmitter coupled with the bias generator to transmit an output signal; and a feedback mechanism to sample the output signal from the transmitter and to provide the sampled output signal to the bias generator.

Abstract: Described herein are a method and an apparatus for minimizing within-die variations in performance parameters of a processor. The apparatus comprising: a reference generator to generate an adjustable compensated reference signal; a bias generator to generate a bias signal based on the adjustable compensated reference signal; a transmitter coupled with the bias generator to transmit an output signal; and a feedback mechanism to sample the output signal from the transmitter and to provide the sampled output signal to the bias generator.

Abstract: Described herein are a method and an apparatus for minimizing within-die variations in performance parameters of a processor. The apparatus comprising: a reference generator to generate an adjustable compensated reference signal; a bias generator to generate a bias signal based on the adjustable compensated reference signal; a transmitter coupled with the bias generator to transmit an output signal; and a feedback mechanism to sample the output signal from the transmitter and to provide the sampled output signal to the bias generator.

Abstract: Described herein are a method and an apparatus for minimizing within-die variations in performance parameters of a processor. The apparatus comprising: a reference generator to generate an adjustable compensated reference signal; a bias generator to generate a bias signal based on the adjustable compensated reference signal; a transmitter coupled with the bias generator to transmit an output signal; and a feedback mechanism to sample the output signal from the transmitter and to provide the sampled output signal to the bias generator.

Abstract: Described herein are a method and an apparatus for minimizing within-die variations in performance parameters of a processor. The apparatus comprising: a reference generator to generate an adjustable compensated reference signal; a bias generator to generate a bias signal based on the adjustable compensated reference signal; a transmitter coupled with the bias generator to transmit an output signal; and a feedback mechanism to sample the output signal from the transmitter and to provide the sampled output signal to the bias generator.