Patents by Inventor Wenli Lin

Wenli Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7736968
    Abstract: A method for forming a semiconductor structure includes providing a semiconductor substrate; forming a gate dielectric layer over the semiconductor substrate; forming a gate electrode layer over the gate dielectric layer; doping carbon and nitrogen into the gate electrode layer; and, after the step of doping carbon and nitrogen, patterning the gate dielectric layer and the gate electrode layer to form a gate dielectric and a gate electrode, respectively.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: June 15, 2010
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Keh-Chiang Ku, Cheng-Lung Hung, Li-Ting Wang, Chien-Hao Chen, Chien-Hao Huang, Wenli Lin, Yu-Chang Lin
  • Publication number: 20100105185
    Abstract: A method for forming a semiconductor structure includes providing a semiconductor substrate; forming a gate dielectric layer over the semiconductor substrate; forming a gate electrode layer over the gate dielectric layer; doping carbon and nitrogen into the gate electrode layer; and, after the step of doping carbon and nitrogen, patterning the gate dielectric layer and the gate electrode layer to form a gate dielectric and a gate electrode, respectively.
    Type: Application
    Filed: October 27, 2008
    Publication date: April 29, 2010
    Inventors: Keh-Chiang Ku, Cheng-Lung Hung, Li-Ting Wang, Chien-Hao Chen, Chien-Hao Huang, Wenli Lin, Yu-Chang Lin
  • Patent number: 7544561
    Abstract: A semiconductor structure includes a PMOS device and an NMOS device. The PMOS device includes a first gate dielectric on a semiconductor substrate, a first gate electrode on the first gate dielectric, and a first gate spacer along sidewalls of the first gate electrode and the first gate dielectric. The NMOS device includes a second gate dielectric on the semiconductor substrate, a second gate electrode on the second gate dielectric, a nitrided polysilicon re-oxidation layer having a vertical portion and a horizontal portion wherein the vertical portion is on sidewalls of the second gate electrode and the second gate dielectric and wherein the horizontal portion is on the semiconductor substrate, and a second gate spacer on sidewalls of the second gate electrode and the second gate dielectric, wherein the second gate spacer is on the horizontal portion of the nitrided polysilicon re-oxidation layer.
    Type: Grant
    Filed: November 6, 2006
    Date of Patent: June 9, 2009
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wenli Lin, Da-Yuan Lee, Chi-Chun Chen, Shih-Chang Chen
  • Publication number: 20080146012
    Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a gate dielectric on a substrate; introducing metal dopants into the gate dielectric; annealing the gate dielectric; and forming a gate electrode on the gate dielectric.
    Type: Application
    Filed: April 2, 2007
    Publication date: June 19, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wenli Lin, Yong-Tian Hou, Kang-Cheng Lin, Kuo-Tai Huang, Tze-Liang Lee, Mong-Song Liang
  • Publication number: 20080124861
    Abstract: A semiconductor structure includes a PMOS device and an NMOS device. The PMOS device includes a first gate dielectric on a semiconductor substrate, a first gate electrode on the first gate dielectric, and a first gate spacer along sidewalls of the first gate electrode and the first gate dielectric. The NMOS device includes a second gate dielectric on the semiconductor substrate, a second gate electrode on the second gate dielectric, a nitrided polysilicon re-oxidation layer having a vertical portion and a horizontal portion wherein the vertical portion is on sidewalls of the second gate electrode and the second gate dielectric and wherein the horizontal portion is on the semiconductor substrate, and a second gate spacer on sidewalls of the second gate electrode and the second gate dielectric, wherein the second gate spacer is on the horizontal portion of the nitrided polysilicon re-oxidation layer.
    Type: Application
    Filed: November 6, 2006
    Publication date: May 29, 2008
    Inventors: Wenli Lin, Da-Yuan Lee, Chi-Chun Chen, Shih-Chang Chen