Abstract: A display substrate and a display device. The display substrate includes: a plurality of pixel islands, a first opening, a second opening and a first passage region. Each pixel island includes at least one pixel, each pixel includes a plurality of first driving lines, the first passage region is provided with a plurality of first connection lines, each of the plurality of pixel islands further includes a plurality of transfer lines, and the plurality of transfer lines are arranged in different layers from the plurality of first driving lines and cross each other to form a plurality of overlapping regions; the plurality of transfer lines are electrically connected with the plurality of first driving lines through via holes located in part of the overlapping regions, and the transfer lines in two adjacent pixel islands are respectively connected with the plurality of first connection lines in the first passage region.

Abstract: The present invention belongs to the field of medicinal chemistry, and particularly relates to synthesis, a preparation method and the use of an inhibitor containing dual targets SHP2 and CDK4/6, wherein the inhibitor comprises three compounds of general formulas I-III and pharmaceutically acceptable salts, enantiomers, diastereomers, tautomers, solvates, polymorphs or prodrugs thereof. According to the present invention, a class of brand-new SHP2 and CDK4/6 dual-target inhibitors are prepared by means of a pharmacophore fusion and reasonable drug design method, so that the problems of drug resistance, poor drug effect, etc., of the existing SHP2 inhibitor and CDK4/6 inhibitor are solved; the great significance of the present invention is providing the first SHP2 and CDK4/6 dual-target inhibitor, which provides a basis for solving the problem of drug resistance of kinase and phosphatase in the later period.

Abstract: A method and system for strategically solving an innovative design problem are provided. A target analysis tool is determined according to a to-be-solved problem. An initial model is generated based on the target analysis tool. A target model is determined according to an interaction relationship among elements in the initial model and the target analysis tool. A problem characterization result of the target model is generated according to a preset interaction relationship. Retrieval information is generated according to the problem characterization result, based on which the retrieval is performed in a preset database to obtain target data. Different analysis tools can be used to analyze different to-be-solved problems. The retrieval is performed based on the problem characterization result to obtain the solution to the to-be-solved problem.

Abstract: A display panel and a display device. Because the pixel distribution density in a second display subarea (A12) is lower than that in a first display subarea (A11), the quantities of sub-pixels (pix) connected to scanning lines are not completely the same; a sub-pixel row having the greatest quantity of sub-pixels (pix) in the display panel is taken as a reference sub-pixel row, the quantity of the sub-pixels (pix) of the reference sub-pixel row is taken as a reference value, a sub-pixel row having the quantity of sub-pixels (pix) smaller than the reference value is taken as a compensation sub-pixel row, and a scanning line connected to the compensation sub-pixel row is taken as a first scanning line; the display panel is provided with load compensation units corresponding to at least part of the first scanning lines, and the load compensation units are located in the second display subarea.

Abstract: An electrolyte includes a compound of formula 1: formula 1. R1 and R2 are each independently selected from H, halogen atom, a substituted or unsubstituted C1-10 alkyl group, a substituted or unsubstituted C3-10 cycloalkyl group, a substituted or unsubstituted C2-10 alkenyl group, a substituted or unsubstituted C2-10 alkynyl group, a substituted or unsubstituted C1-10 alkoxy group, a substituted or unsubstituted C6-10 aryl group, a substituted or unsubstituted C3-10 heteroaryl group, or any combination thereof.

Abstract: A display substrate is provided, including: a base substrate, and a first semiconductor layer, a first conductive layer, a second semiconductor layer and a fourth conductive layer sequentially arranged on the base substrate. The display substrate includes first and third transistors. The first transistor includes a first active layer in the second semiconductor layer, and first bottom and top gate electrodes respectively on opposite sides of the first active layer. The third transistor includes a third active layer in the first semiconductor layer and a third gate electrode, the third active layer containing a polysilicon semiconductor material. The fourth conductive layer is on a side of the first top gate electrode away from the base substrate, and includes second and third conductive components. The first transistor is electrically connected to the third gate electrode of the third transistor through the second and third conductive components.

Abstract: An array substrate includes a pixel driving circuit, a base substrate, a first conductive layer, a first dielectric layer, a second conductive layer, and a data line. The pixel driving circuit includes a driving transistor, a first transistor, a capacitor, and a second transistor. The first conductive layer is laminated at a side of the base substrate and includes a first conductive portion. The first dielectric layer is laminated at a side of the first conductive layer away from the base substrate. The second conductive layer is laminated at a side of the first dielectric layer away from the base substrate, and includes a fourth gate line. The first conductive layer further includes a first gate line. An orthographic projection of the first gate line on the base substrate is located between orthographic projections of the fourth gate line and the first conductive portion on the base substrate.

Abstract: An electrolytic solution includes a compound containing a —CN functional group and a compound containing a silicon functional group. M is C or Si. R11, R12, and R13 are each independently selected from a substituted or non-substituted C1-C12 alkylene group, a substituted or non-substituted C2-C12 alkenylene group, an O—R group, an R0—S—R group or an R0—O—R group, R0 and R are each independently selected from a substituted or non-substituted C1-C6 alkylene group. n is 0 or 1. R14 is H, fluorine, a cyano group, a substituted or non-substituted C1-C12 alkyl group, a substituted or non-substituted C2-C12 alkenyl group, an O—R1 group, an R0—S—R1 group, or an R0—O—R1 group. R0 is a substituted or non-substituted C1-C6 alkylene group, and R1 is a substituted or non-substituted C1-C6 alkyl group.

Abstract: A method and system for strategically solving an innovative design problem are provided. A target analysis tool is determined according to a to-be-solved problem. An initial model is generated based on the target analysis tool. A target model is determined according to an interaction relationship among elements in the initial model and the target analysis tool. A problem characterization result of the target model is generated according to a preset interaction relationship. Retrieval information is generated according to the problem characterization result, based on which the retrieval is performed in a preset database to obtain target data. Different analysis tools can be used to analyze different to-be-solved problems. The retrieval is performed based on the problem characterization result to obtain the solution to the to-be-solved problem.

Abstract: A method and system for multi-participant based conceptual design information modeling. The method includes the following steps. Initial design information generated by a plurality of design participants involved in different design stages during conceptual design of a target product is acquired. The initial design information is screened to obtain target design information in a target carrier form according to a carrier form corresponding to the initial design information. Subject information is extracted from the target design information. Based on a plurality of visualized forms under a plurality of dimensions, a plurality of visualized views of the subject information are generated under the plurality of dimension. A visualized view corresponding to a display authority of a design participant is displayed on the graphical user interface. The design participant can modify the design information based on the visualized view to obtain a target design information model.

Abstract: An electrochemical device includes a negative electrode and an electrolyte solution. The negative electrode includes a negative current collector and a negative electrode mixture layer. The negative electrode mixture layer includes a first section, a second section, and a third section arranged sequentially in a thickness direction. The first section, the second section, and the third section are of an identical thickness. A ratio of a porosity P1 of the first section to a porosity P2 of the third section is P. The electrolyte solution includes an additive A, which is at least one selected from a compound of Formula I or a compound of Formula II: Based on a total mass of the electrolyte solution, a mass percent of the additive A is w %, satisfying 1?w?60, P=P1/P2, and P/(w %+1)?50%.

Abstract: An electrolytic solution includes the compound of Formula I and a carboxylate compound: The electrochemical device prepared with the electrolytic solution has reduced storage impedance, and improved post-storage swelling, overcharge performance and hot box performance.

Abstract: A display substrate, a display panel, and a display device are provided. The display substrate includes: a base substrate; and a first transistor on the base substrate. The first transistor includes a first active layer, a first bottom gate electrode between the base substrate and the first active layer, and a first top gate electrode on a side of the first active layer away from the base substrate. A third gate insulating layer is provided between the first bottom gate electrode and the first active layer. The first active layer contains an oxide semiconductor material, and the third gate insulating layer contains a silicon oxide material. A surface of the first bottom gate electrode away from the base substrate is in direct contact with the silicon oxide material, and a surface of the first active layer close to the base substrate is in direct contact with the silicon oxide material.

Abstract: This disclosure provides an array substrate, a fabrication method thereof, and a display device. The array substrate includes a P-type driving transistor, an N-type first transistor, a capacitor, a base substrate, a first conductive layer laminated at a side of the base substrate, a first dielectric layer laminated at a side of the first conductive layer away from the base substrate, a first buffer layer laminated at a side of the first dielectric layer facing away from the base substrate and having a slot, and a second conductive layer laminated at a side of the first buffer layer facing away from the base substrate. The second conductive layer includes a second conductive portion configured as the gate electrode of the first transistor, and a third conductive portion located at the bottom of the slot to form the second electrode of the capacitor.

Abstract: Methods, systems, and apparatus for rate control are provided. In one aspect, a rate control method includes: receiving, by a control device, a connection establishment request from a terminal, the connection establishment request being for establishing a connection for the terminal to transmit data, and sending, by the control device, rate control time management information to a data sending device. The data sending device is configured to perform rate control over the data sent through the connection based on the time management information. The ratio control time management information includes start time indication information of a rate control time unit used for rate control, and the start time indication information indicates a start time of the rate control time unit.

Abstract: A display panel and a display device are disclosed, the display panel comprises: a base substrate; and pixel circuits in an array, the display panel comprises a light transmittance region and a display region around the light transmittance region, the pixel circuits are disposed in the display region, a gate line of each row of m rows of pixel circuits is divided into a first gate line portion and a second gate line portion which are connected through an auxiliary gate line, a data line of each column of n columns of pixel circuits is divided into a first data line portion and a second data line portion which are connected through an auxiliary data line.

Abstract: This disclosure provides an array substrate and a display device. In the array substrate, the pixel driving circuit includes a driving transistor, a first transistor and a second transistor. The driving transistor and the first transistor are P-type transistors, and the second transistor is N-type transistor. The array substrate also includes a base substrate, and a first conductive layer arranged at a side of the base substrate and including: a first conductive portion forming a gate electrode of the driving transistor; a first gate line at a side of the first conductive portion, a part of the first gate line being configured to form a gate electrode of the first transistor; and a second gate line at a side of the first gate line away from the first conductive portion, a part of the second gate line being configured to form a first gate electrode of the second transistor.