Patents by Inventor Wensen Hung
Wensen Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250118608Abstract: A semiconductor package and the method of forming the same are provided. The semiconductor package may include a substrate, an integrated circuit package component having a semiconductor die bonded to the substrate, and a ring structure on the substrate, wherein the ring structure may encircle the integrated circuit package component in a top-down view. The ring structure may comprise a first attached segment, a second attached segment attached to the substrate by an adhesive, and a first suspended segment between the first attached segment and the second attached segment. The first suspended segment may be suspended over the substrate. The first attached segment and the second attached segment may be spaced apart from the package component by a first distance and a second distance, respectively. The first suspended segment may be spaced apart from the package component by a third distance different from the first distance and the second distance.Type: ApplicationFiled: October 9, 2023Publication date: April 10, 2025Inventors: Wensen Hung, Yen-Fu Su, Tsung-Yu Chen
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Patent number: 12272612Abstract: A semiconductor package module includes a package, a conductive layer, and a heat dissipating module. The package includes a semiconductor die. The conductive layer is disposed over the package. The heat dissipating module is disposed over the conductive layer, and the package and the heat dissipating module prop against two opposite sides of the conductive layer, where the heat dissipating module is thermally coupled to and electrically isolated from the package through the conductive layer.Type: GrantFiled: March 18, 2022Date of Patent: April 8, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wensen Hung, Tsung-Yu Chen
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Publication number: 20250069980Abstract: A semiconductor structure includes a circuit substrate, a semiconductor die, and a cover. The semiconductor die is disposed on the circuit substrate. The cover is disposed over the semiconductor die and over the circuit substrate. The cover comprises a lid portion and a support portion. The structure includes a first adhesive bonding the support portion to the circuit substrate and a second adhesive bonding the support portion and the lid portion.Type: ApplicationFiled: November 14, 2024Publication date: February 27, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wensen Hung, Ping-Kang Huang, Sao-Ling Chiu, Tsung-Yu Chen, Tsung-Shu Lin, Chien-Yuan Huang, Chen-Hsiang Lao
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Patent number: 12170237Abstract: A semiconductor structure includes a circuit substrate, a semiconductor die, and a cover. The semiconductor die is disposed on the circuit substrate. The cover is disposed over the semiconductor die and over the circuit substrate. The cover comprises a lid portion and a support portion. The structure includes a first adhesive bonding the support portion to the circuit substrate and a second adhesive bonding the support portion and the lid portion.Type: GrantFiled: June 14, 2023Date of Patent: December 17, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wensen Hung, Ping-Kang Huang, Sao-Ling Chiu, Tsung-Yu Chen, Tsung-Shu Lin, Chien-Yuan Huang, Chen-Hsiang Lao
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Publication number: 20240387315Abstract: A semiconductor package module includes a package, a conductive layer, and a heat dissipating module. The package includes a semiconductor die. The conductive layer is disposed over the package. The heat dissipating module is disposed over the conductive layer, and the package and the heat dissipating module prop against two opposite sides of the conductive layer, where the heat dissipating module is thermally coupled to and electrically isolated from the package through the conductive layer.Type: ApplicationFiled: July 29, 2024Publication date: November 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wensen Hung, Tsung-Yu Chen
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Publication number: 20240387307Abstract: A semiconductor package includes a first component, a second component, and a stiffener rib. The first component is disposed on a substrate. The second component is disposed aside the first component and on the substrate. The stiffener rib is disposed between the first component and the second component. The lid is attached to the stiffener rib, the first component and the second component. The lid includes a recess portion on the stiffener rib. A first sidewall and a second sidewall of the recess portion laterally surround the stiffener rib. A first top space between a first top sidewall of the stiffener rib and the first sidewall of the recess portion is greater than a second top space between a second top sidewall of the stiffener rib and the second sidewall of the recess portion.Type: ApplicationFiled: July 30, 2024Publication date: November 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wensen Hung, Yu-Ling Tsai, Chien-Chia Chiu, Tsung-Yu Chen
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Publication number: 20240371794Abstract: A semiconductor device includes a circuit substrate, a semiconductor package, and a metallic cover. The semiconductor package is disposed on the circuit substrate. The metallic cover is disposed over the semiconductor package and over the circuit substrate. The metallic cover comprises a cap and outer flanges. The cap overlies the semiconductor package. The outer flanges are disposed at edges of the cap, are connected with the cap, and extend towards the circuit substrate. A region of the bottom surface of the cap has a curved profile matching a warpage profile of the semiconductor package and the circuit substrate, and the region having the curved profile extends over the semiconductor package.Type: ApplicationFiled: July 17, 2024Publication date: November 7, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wensen Hung, Hsuan-Ning Shih, Hsien-Pin Hu, Tsung-Shu Lin, Tsung-Yu Chen, Wen-Hsin Wei
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Publication number: 20240363611Abstract: A structure including a wiring substrate, an interposer disposed on and electrically connected to the wiring substrate, a semiconductor die disposed on and electrically connected to the interposer, a first insulating encapsulation disposed on the interposer, a second insulating encapsulation disposed on the wiring substrate, and a lid is provided. The semiconductor die is laterally encapsulated by the first insulating encapsulation. The semiconductor die and the first insulating encapsulation are laterally encapsulated by the second insulating encapsulation. A top surface of the first insulating encapsulation is substantially leveled with a top surface of the second insulating encapsulation and a surface of the semiconductor die. The lid is disposed on the semiconductor die, the first insulating encapsulation and the second insulating encapsulation.Type: ApplicationFiled: July 9, 2024Publication date: October 31, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsung-Shu Lin, Tsung-Yu Chen, Wensen Hung
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Patent number: 12125757Abstract: A semiconductor package includes a chip package disposed on a substrate, a plurality of electronic components disposed aside the chip package on the substrate and a stiffener structure disposed on the substrate. The stiffener structure includes a stiffener ring surrounding the chip package and the plurality of electronic components, a stiffener rib between the chip package and the plurality of electronic components, wherein the stiffener rib includes a first portion and a second portion on the first portion, and a width of the second portion is greater than a width of the first portion. The semiconductor package further includes a lid attached to the stiffener structure, the chip package and the plurality of electronic components. A method of forming the semiconductor package is also provided.Type: GrantFiled: June 17, 2023Date of Patent: October 22, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wensen Hung, Yu-Ling Tsai, Chien-Chia Chiu, Tsung-Yu Chen
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Patent number: 12094836Abstract: A semiconductor device includes a circuit substrate, a semiconductor package, and a metallic cover. The semiconductor package is disposed on the circuit substrate. The metallic cover is disposed over the semiconductor package and over the circuit substrate. The metallic cover comprises a cap and outer flanges. The cap overlies the semiconductor package. The outer flanges are disposed at edges of the cap, are connected with the cap, and extend towards the circuit substrate. A region of the bottom surface of the cap has a curved profile matching a warpage profile of the semiconductor package and the circuit substrate, and the region having the curved profile extends over the semiconductor package.Type: GrantFiled: September 25, 2020Date of Patent: September 17, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wensen Hung, Hsuan-Ning Shih, Hsien-Pin Hu, Tsung-Shu Lin, Tsung-Yu Chen, Wen-Hsin Wei
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Patent number: 12074154Abstract: A structure including a wiring substrate, an interposer disposed on and electrically connected to the wiring substrate, a semiconductor die disposed on and electrically connected to the interposer, a first insulating encapsulation disposed on the interposer, a second insulating encapsulation disposed on the wiring substrate, and a lid is provided. The semiconductor die is laterally encapsulated by the first insulating encapsulation. The semiconductor die and the first insulating encapsulation are laterally encapsulated by the second insulating encapsulation. A top surface of the first insulating encapsulation is substantially leveled with a top surface of the second insulating encapsulation and a surface of the semiconductor die. The lid is disposed on the semiconductor die, the first insulating encapsulation and the second insulating encapsulation.Type: GrantFiled: January 25, 2022Date of Patent: August 27, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsung-Shu Lin, Tsung-Yu Chen, Wensen Hung
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Publication number: 20240234223Abstract: A manufacturing method of a semiconductor package includes the following steps. A package structure is provided over a substrate. A thermal interface layer is provided over the package structure. A lid structure is provided over the substrate, wherein the lid structure comprises a main body in contact with the package structure through the thermal interface layer and surrounding the package structure and a plurality of rib portions protruded from the main body and extended toward the package structure.Type: ApplicationFiled: February 6, 2024Publication date: July 11, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsung-Shu Lin, Wensen Hung, Tsung-Yu Chen
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Publication number: 20240222218Abstract: A package includes a substrate having a conductive layer, and the conductive layer comprises an exposed portion. A die stack is disposed over the substrate and electrically connected to the conductive layer. A high thermal conductivity material is disposed over the substrate and contacting the exposed portion of the conductive layer. The package further includes a contour ring over and contacting the high thermal conductivity material.Type: ApplicationFiled: March 14, 2024Publication date: July 4, 2024Inventors: Wensen Hung, Szu-Po Huang, Hsiang-Fan Lee, Kim Hong Chen, Chi-Hsi Wu, Shin-Puu Jeng
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Patent number: 12021006Abstract: An apparatus for manufacturing packaged semiconductor devices includes a lower plate having package platforms and clamp guide pins to align an upper plate with the lower plate, and a boat tray having windows configured to receive package devices, and a plurality of upper plates configured to be aligned to respective windows and respective package platforms. Clamping force can be applied by fasteners configured to generate a downward force upon the upper plate. Package devices on the platforms are thus subjected to a clamping force. Load cells measure the clamping force so adjustments can be made.Type: GrantFiled: July 28, 2023Date of Patent: June 25, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Wensen Hung, Tsung-Yu Chen, Tsung-Shu Lin, Chen-Hsiang Lao, Wen-Hsin Wei, Hsien-Pin Hu
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Publication number: 20240178095Abstract: A semiconductor device includes a substrate, a first device, a second device, a ring structure, a lid structure, and a first adhesive layer. The first device is disposed on the substrate. The second device is adjacent to the first device and is disposed on the substrate. The ring structure is disposed over the substrate and the second device. The ring structure includes a cover and a leg extending out from the cover. The cover has a through opening. The lid structure is disposed over the ring structure and the first device. The lid structure includes a body and a protrusion protruding from the body. The protrusion of the lid structure is inserted into the through opening of the cover of the ring structure. The first adhesive layer is disposed between the body of the lid structure and the cover of the ring structure and includes phase change thermal interface material.Type: ApplicationFiled: February 10, 2023Publication date: May 30, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wensen Hung, Tsung-Yu Chen, Meng-Tsan Lee
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Patent number: 11961779Abstract: A package includes a substrate having a conductive layer, and the conductive layer comprises an exposed portion. A die stack is disposed over the substrate and electrically connected to the conductive layer. A high thermal conductivity material is disposed over the substrate and contacting the exposed portion of the conductive layer. The package further includes a contour ring over and contacting the high thermal conductivity material.Type: GrantFiled: May 27, 2021Date of Patent: April 16, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd. (TSMC).Inventors: Wensen Hung, Szu-Po Huang, Hsiang-Fan Lee, Kim Hong Chen, Chi-Hsi Wu, Shin-Puu Jeng
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Publication number: 20240105530Abstract: In an embodiment, a device includes: an integrated circuit package including: a package component; and a package stiffener attached to the package component; and a heat spreader attached to the integrated circuit package, a main portion of the heat spreader disposed above the package stiffener, a protruding portion of the heat spreader extending through the package stiffener; an elastic adhesive material between the main portion of the heat spreader and the package stiffener; and a thermal interface material between the protruding portion of the heat spreader and the package component, the thermal interface material different from the elastic adhesive material.Type: ApplicationFiled: January 6, 2023Publication date: March 28, 2024Inventors: Wensen Hung, Tsung-Yu Chen
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Publication number: 20240088093Abstract: In an embodiment, a method includes: attaching a package component to a package substrate, the package component includes: a first die being disposed over an interposer; a second die being disposed over the interposer and laterally adjacent to the first die; and an encapsulant being disposed around the first die and the second die; attaching a thermal interface material to the first die and the second die; and attaching a lid structure to the package substrate, the lid structure includes: a lid cap being disposed over the thermal interface material; and a plurality of lid feet connecting the lid cap to the package substrate, in a plan view the plurality of lid feet forming a discontinuous loop around the package component.Type: ApplicationFiled: January 4, 2023Publication date: March 14, 2024Inventors: Wensen Hung, Tsung-Yu Chen, Wen-Hsin Wei, Hsien-Pin Hu
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Patent number: 11929293Abstract: A semiconductor package includes a substrate, a package structure, and a lid structure. The package structure is disposed on the substrate. The lid structure is disposed over substrate, wherein the lid structure includes a main body covering and surrounding the package structure and a plurality of rib portions protruded from the main body and extended toward the package structure.Type: GrantFiled: August 19, 2021Date of Patent: March 12, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsung-Shu Lin, Wensen Hung, Tsung-Yu Chen
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Publication number: 20240038617Abstract: A package structure includes a substrate, a semiconductor package disposed over the substrate, a first lid structure disposed over the substrate, and a second lid structure disposed over the semiconductor package and the first lid structure. The first lid structure includes an opening exposing a region of the semiconductor package. A thermal interface material is disposed between the second lid structure and the semiconductor package, and a phase change adhesive is disposed between the second lid structure and the first lid structure.Type: ApplicationFiled: July 26, 2022Publication date: February 1, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wensen Hung, Jia-Syuan Li, Tsung-Yu Chen