Abstract: An integrated circuit package and the method of forming the same are provided. The integrated circuit package may include a first die. The first die may include a first semiconductor substrate, a first bonding layer over the first semiconductor substrate, and a first die connector in the first bonding layer. The first bonding layer may include a first portion including a first material and a second portion including a second material, wherein the first material is different from the second material. A surface of the first bonding layer may include a surface of the first portion, a surface of the second portion, and a surface of the first die connector.

Abstract: An integrated circuit package and the method of forming the same are provided. The integrated circuit package may include a first die, which may include a first semiconductor substrate, a first interconnect structure on the first semiconductor substrate, and a first seal ring. The first interconnect structure may include a first plurality of dielectric layers, a first plurality of metallization patterns in the first plurality of dielectric layers. The first seal ring may be in the first plurality of dielectric layers and may encircle the first plurality of metallization patterns in a top-down view. The integrated circuit package may further include a first bonding layer on the first interconnect structure, a first die connector and a second die connector in the first bonding layer. The first seal ring may encircle the first die connector and the second die connector may be outside the first seal ring in the top-down view.

Abstract: A method includes forming a package structure, where forming the package structure includes attaching a package component to a front side of a package substrate, where the package component includes a first die, and attaching a second die to a back side of the package substrate, and inserting a portion of the package structure into a first cavity of a fixture, where the fixture includes a thermoelectric cooling (TEC) module that is disposed in a second cavity of the fixture, where the second cavity of the fixture is disposed within a bottom surface of the first cavity, where after inserting the portion of the package structure into the first cavity of the fixture, the second die is in thermal contact with the TEC module, and where the fixture is coupled to a printed circuit board (PCB).

Abstract: A package structure includes a package substrate, a package module on the package substrate, an outer molding material layer on the package substrate around the package module, a thermal interface material (TIM) layer on the package module, and a package lid on the TIM layer and attached to the outer molding material layer. The package lid includes a bottom lid portion having a first coefficient of thermal expansion (CTE), and a top lid portion attached to the bottom lid portion and having a second CTE less than the first CTE.

Abstract: In an embodiment, a method includes: attaching a package component to a package substrate, the package component includes: a first die being disposed over an interposer; a second die being disposed over the interposer and laterally adjacent to the first die; and an encapsulant being disposed around the first die and the second die; attaching a thermal interface material to the first die and the second die; and attaching a lid structure to the package substrate, the lid structure includes: a lid cap being disposed over the thermal interface material; and a plurality of lid feet connecting the lid cap to the package substrate, in a plan view the plurality of lid feet forming a discontinuous loop around the package component.

Abstract: In an embodiment, a device includes: an integrated circuit package including: a package component; and a package stiffener attached to the package component; and a heat spreader attached to the integrated circuit package, a main portion of the heat spreader disposed above the package stiffener, a protruding portion of the heat spreader extending through the package stiffener; an elastic adhesive material between the main portion of the heat spreader and the package stiffener; and a thermal interface material between the protruding portion of the heat spreader and the package component, the thermal interface material different from the elastic adhesive material.

Abstract: A device includes a semiconductor package including a first side and a second side opposite to each other, a substrate coupled to the second side of the semiconductor package, and a lid coupled to the substrate and the first side of the semiconductor package. The lid includes a first surface and a second surface opposite to each other, the second surface faces the semiconductor package, and the first surface is flatter than the second surface.

Abstract: In an embodiment, a device includes: an integrated circuit package including: a package component; and a package stiffener attached to the package component; and a heat spreader attached to the integrated circuit package, a main portion of the heat spreader disposed above the package stiffener, a protruding portion of the heat spreader extending through the package stiffener; an elastic adhesive material between the main portion of the heat spreader and the package stiffener; and a thermal interface material between the protruding portion of the heat spreader and the package component, the thermal interface material different from the elastic adhesive material.

Abstract: A packaging structure may be formed by: providing a composite package including at least one semiconductor die and a die frame; attaching the composite package to a packaging substrate to form a bonded assembly; providing a lid structure including a bottom plate portion, a top plate portion, a sidewall frame portion laterally surrounding a cavity located between the bottom plate portion and the top plate portion, and solid block portions vertically extending between the bottom plate portion and the top plate portion; and attaching the lid structure to the bonded assembly such that a thermal interface material (TIM) layer is interposed between the at least one semiconductor die and the bottom plate portion. The solid block portions do not have any areal overlap with the at least one semiconductor die in a plan view along a vertical direction.

Abstract: In an embodiment, a method includes: attaching a package component to a package substrate, the package component includes: a first die being disposed over an interposer; a second die being disposed over the interposer and laterally adjacent to the first die; and an encapsulant being disposed around the first die and the second die; attaching a thermal interface material to the first die and the second die; and attaching a lid structure to the package substrate, the lid structure includes: a lid cap being disposed over the thermal interface material; and a plurality of lid feet connecting the lid cap to the package substrate, in a plan view the plurality of lid feet forming a discontinuous loop around the package component.

Abstract: A semiconductor package includes a first component, a second component, and a stiffener rib. The first component is disposed on a substrate. The second component is disposed aside the first component and on the substrate. The stiffener rib is disposed between the first component and the second component. The lid is attached to the stiffener rib, the first component and the second component. The lid includes a recess portion on the stiffener rib. A first sidewall and a second sidewall of the recess portion laterally surround the stiffener rib. A first top space between a first top sidewall of the stiffener rib and the first sidewall of the recess portion is greater than a second top space between a second top sidewall of the stiffener rib and the second sidewall of the recess portion.

Abstract: A method includes attaching a permeable plate to a metal lid, with the permeable plate including a metallic material, and dispensing a liquid-metal-comprising media to a first package component. The first package component is over and bonded to a second package component. The liquid-metal-comprising media includes a liquid metal therein. The method further includes attaching the metal lid to the second package component. During the attaching, the liquid-metal-comprising media migrates into the permeable plate to form a composite thermal interface material.

Abstract: A chip package structure includes an assembly containing an interposer and semiconductor dies; a packaging substrate attached to the assembly through solder material portions; and a lid structure attached to the packaging substrate. The lid structure includes: a first plate portion having a first thickness and located in an interposer-projection region having an areal overlap with the interposer in a plan view; a second plate portion having a second thickness that is less than the first thickness, laterally surrounding, and adjoined to, the first plate portion, and located outside the interposer-projection region; and a plurality of foot portions adjoined to the second plate portion, laterally spaced from the first plate portion, and attached to a respective top surface segment of the packaging substrate through a respective adhesive portion.

Abstract: A semiconductor package includes a substrate, a die, a first bonding material, a second bonding material and a heat dissipation system. The die is connected to the substrate. The first bonding material is disposed on the substrate beside the die. The second bonding material is disposed on and covers the die. The heat dissipation system, having a bottom surface in contact with the second bonding material, is disposed on the second bonding material over the die and on the first bonding material on the substrate. The heat dissipation system is fixed to the substrate through the first bonding material. The bottom surface of the heat dissipation system is fixed to the die through the second bonding material with a bonding interface existing therebetween, and the bonding interface includes a first curved surface.

Abstract: A package structure includes a package substrate, a package module on the package substrate, an outer molding material layer on the package substrate around the package module, a thermal interface material (TIM) layer on the package module, and a package lid on the TIM layer and attached to the outer molding material layer. The package lid includes a bottom lid portion having a first coefficient of thermal expansion (CTE), and a top lid portion attached to the bottom lid portion and having a second CTE less than the first CTE.

Abstract: A semiconductor package includes a substrate, a package structure, and a lid structure. The package structure is bonded over the substrate. The lid structure is bonded over the substrate and thermally coupled to the package structure, wherein the lid structure includes a fluid chamber and a plurality of spring members disposed in the fluid chamber, wherein each of the plurality of spring members is connected between an upper plate and a lower plate of the fluid chamber.

Abstract: In an embodiment, a device includes: a die stack over and electrically connected to an interposer, the die stack including a topmost integrated circuit die including: a substrate having a front side and a back side opposite the front side, the front side of the substrate including an active surface; a dummy through substrate via (TSV) extending from the back side of the substrate at least partially into the substrate, the dummy TSV electrically isolated from the active surface; a thermal interface material over the topmost integrated circuit die; and a dummy connector in the thermal interface material, the thermal interface material surrounding the dummy connector, the dummy connector electrically isolated from the active surface of the topmost integrated circuit die.

Abstract: A semiconductor package includes a first component, a second component, and a stiffener rib. The first component is disposed on a substrate. The second component is disposed aside the first component and on the substrate. The stiffener rib is disposed between the first component and the second component. The lid is attached to the stiffener rib, the first component and the second component. The lid includes a recess portion on the stiffener rib. A first sidewall and a second sidewall of the recess portion laterally surround the stiffener rib. A first top space between a first top sidewall of the stiffener rib and the first sidewall of the recess portion is greater than a second top space between a second top sidewall of the stiffener rib and the second sidewall of the recess portion.

Abstract: A chip package structure includes an assembly containing an interposer and semiconductor dies; a packaging substrate attached to the assembly through solder material portions; and a lid structure attached to the packaging substrate. The lid structure includes: a first plate portion having a first thickness and located in an interposer-projection region having an areal overlap with the interposer in a plan view; a second plate portion having a second thickness that is less than the first thickness, laterally surrounding, and adjoined to, the first plate portion, and located outside the interposer-projection region; and a plurality of foot portions adjoined to the second plate portion, laterally spaced from the first plate portion, and attached to a respective top surface segment of the packaging substrate through a respective adhesive portion.

Abstract: A semiconductor package includes one or more semiconductor dies, and a lid disposed on the one or more semiconductor dies. One or more thermoelectric coolers are disposed on or in the lid. Each thermoelectric cooler is positioned at a predetermined hotspot of the one or more semiconductor dies. In one method of operating such a semiconductor package, functions are run on one or more semiconductor dies of the semiconductor package. During the running of these functions, one or more predetermined hotspots of the one or more semiconductor dies are cooled by operating a thermoelectric cooler positioned at each respective predetermined hotspot.