Patents by Inventor Wenshui Zhang

Wenshui Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220341989
    Abstract: A test system for high voltage testing of semiconductor devices including at least one test socket and a docking plate assembly. Each test socket includes a socket enclosure for encompassing first and second contact finger assemblies, in which the socket enclosure may include a cover and alignment plate. At least one test socket is embedded within the docking plate assembly which is configured to mount between high voltage test head and a pick and place handler. The docking plate assembly and each test socket includes one or more site openings each for receiving a corresponding device under test (DUT) during a high voltage test procedure. Each contact finger assembly includes at least one contact finger configured as an elongated conductor with a bent tip for electrically interfacing a pad of the DUT.
    Type: Application
    Filed: April 27, 2021
    Publication date: October 27, 2022
    Inventors: Wenshui Zhang, Wei Jue Lim
  • Patent number: 11460501
    Abstract: A test system for high voltage testing of semiconductor devices including at least one test socket and a docking plate assembly. Each test socket includes a socket enclosure for encompassing first and second contact finger assemblies, in which the socket enclosure may include a cover and alignment plate. At least one test socket is embedded within the docking plate assembly which is configured to mount between high voltage test head and a pick and place handler. The docking plate assembly and each test socket includes one or more site openings each for receiving a corresponding device under test (DUT) during a high voltage test procedure. Each contact finger assembly includes at least one contact finger configured as an elongated conductor with a bent tip for electrically interfacing a pad of the DUT.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: October 4, 2022
    Assignee: Silicon Laboratories Inc.
    Inventors: Wenshui Zhang, Wei Jue Lim
  • Patent number: 10698001
    Abstract: A modular integrated circuit test fixture integrates the integrated circuit (IC) handler to IC test fixture alignment interface (the alignment plate) into a daughter card subassembly, which reduces the overall rejection rate of devices due to alignment errors. The test fixture has a plurality of daughter card subassemblies for receiving integrated circuits for testing. Each daughter card subassembly is independently removable from the test fixture and includes a daughter card for a particular size and type of integrated circuit, a plurality of sockets electrically and mechanically coupled to the daughter card to receive respective integrated circuits for testing, and an alignment plate to provide alignment between an IC handler and respective ones of the daughter card subassemblies and to provide alignment for one or more manual test lids. The manual test lids are removed for automatic testing using an IC handler.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: June 30, 2020
    Assignee: Silicon Laboratories Inc.
    Inventors: Larry R. Rose, Wenshui Zhang
  • Patent number: 10551411
    Abstract: A test system for testing semiconductor chips including a docking plate, a test card, chip sockets, a stiffener, and test electronics. Each test card has a uniform card configuration that may be used with any of several different handlers. Each test card includes conductive pads electrically coupled to and longitudinally offset from a socket interface along a length of the test card. The stiffener includes a test interface including conductive pins for electrically interfacing the conductive pads of the test card. The test card is supported by the stiffener so that it remains undeformed as each chip is plunged into a test socket. The test interface includes a basin that is covered by the test card to form a thermal isolation cavity for thermal separation from the test electronics. A uniform radio frequency interface is provided between each test card and a corresponding test interface.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: February 4, 2020
    Assignee: Silicon Laboratories Inc.
    Inventors: Scott E. Caudle, Wenshui Zhang, Raymond A. Booher
  • Publication number: 20190250188
    Abstract: A test system for testing semiconductor chips including a docking plate, a test card, chip sockets, a stiffener, and test electronics. Each test card has a uniform card configuration that may be used with any of several different handlers. Each test card includes conductive pads electrically coupled to and longitudinally offset from a socket interface along a length of the test card. The stiffener includes a test interface including conductive pins for electrically interfacing the conductive pads of the test card. The test card is supported by the stiffener so that it remains undeformed as each chip is plunged into a test socket. The test interface includes a basin that is covered by the test card to form a thermal isolation cavity for thermal separation from the test electronics. A uniform radio frequency interface is provided between each test card and a corresponding test interface.
    Type: Application
    Filed: February 9, 2018
    Publication date: August 15, 2019
    Inventors: SCOTT E. CAUDLE, WENSHUI ZHANG, RAYMOND A. BOOHER
  • Publication number: 20190162755
    Abstract: A modular integrated circuit test fixture integrates the integrated circuit (IC) handler to IC test fixture alignment interface (the alignment plate) into a daughter card subassembly, which reduces the overall rejection rate of devices due to alignment errors. The test fixture has a plurality of daughter card subassemblies for receiving integrated circuits for testing. Each daughter card subassembly is independently removable from the test fixture and includes a daughter card for a particular size and type of integrated circuit, a plurality of sockets electrically and mechanically coupled to the daughter card to receive respective integrated circuits for testing, and an alignment plate to provide alignment between an IC handler and respective ones of the daughter card subassemblies and to provide alignment for one or more manual test lids. The manual test lids are removed for automatic testing using an IC handler.
    Type: Application
    Filed: November 28, 2017
    Publication date: May 30, 2019
    Inventors: Larry R. Rose, Wenshui Zhang
  • Patent number: 9274140
    Abstract: A contactor uses a pogo block in a first configuration as a direct integrated circuit test socket and the contactor can be reconfigured to provide a pogo block assembly to interface between a main test printed circuit board (PCB) and a daughter card that is dedicated to a specific device handler and/or a specific package type that can be different from the main test PCB. A pogo block is inserted into a thick frame with an alignment plate for contactor use in which a device under test fits into a recess in the frame through an alignment plate to align the device under test to make contact with electrical contacts of the contactor. The frame and guide plate can be removed and a thinner frame coupled to the contactor, which changes its function to a pogo block assembly.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: March 1, 2016
    Assignee: Silicon Laboratories Inc.
    Inventors: Larry R. Rose, Craig N. Gabelmann, Wenshui Zhang
  • Publication number: 20140232425
    Abstract: A contactor uses a pogo block in a first configuration as a direct integrated circuit test socket and the contactor can be reconfigured to provide a pogo block assembly to interface between a main test printed circuit board (PCB) and a daughter card that is dedicated to a specific device handler and/or a specific package type that can be different from the main test PCB. A pogo block is inserted into a thick frame with an alignment plate for contactor use in which a device under test fits into a recess in the frame through an alignment plate to align the device under test to make contact with electrical contacts of the contactor. The frame and guide plate can be removed and a thinner frame coupled to the contactor, which changes its function to a pogo block assembly.
    Type: Application
    Filed: February 20, 2013
    Publication date: August 21, 2014
    Applicant: SILICON LABORATORIES INC.
    Inventors: Larry R. Rose, Craig N. Gabelmann, Wenshui Zhang