Abstract: An array substrate and a display panel are provided. The array substrate includes a base substrate having a notch, the base substrate comprising a first region and a second region on opposite sides of the notch; a plurality of gate lines disposed on the base substrate and configured to respectively drive a plurality of rows of pixels on the base substrate, each of the plurality of gate lines being interrupted by the notch into a first gate sub-line in the first region and a second gate sub-line in the second region; and a gate driving device in the first region and/or the second region, the gate driving device is configured such that the first gate sub-line and the second gate sub-line of each of the plurality of gate lines are simultaneously scanned.

Abstract: A display panel and a display device are provided. The display panel includes a base substrate, the base substrate includes a display region and a non-display region, the display region includes a main display region and a peripheral display region, and the peripheral display region includes an irregular display region; the non-display region includes a first region and a second region, the first region is adjacent to the irregular display region, and the second region is adjacent to other regions of the peripheral display region than the irregular display region; the display region includes at least one signal line, the non-display region includes at least one functional circuit and at least one wire, and the at least one functional circuit is coupled to the at least one signal line via the at least one wire.

Abstract: An array substrate includes a base substrate, a plurality of first signal lines extending in a first direction, a plurality of second signal lines located on a different layer from the first signal lines and extending in a second direction intersecting the first direction, and a plurality of touch signal lines extending in the second direction disposed on the base substrate. Each touch signal line includes a first touch line segment and a second touch line segment, the first touch line segment disposed on the same layer as the first signal lines, and at least partially overlapping with at least one of the second signal lines in a direction perpendicular to a surface of the base substrate, the second touch line segment disposed on a different layer from the first signal lines, and the first touch line segment electrically connected with the second touch line segment through a first via.

Abstract: Embodiments of the present application provide a display driving circuit, a method for controlling the same, and a display apparatus. The display driving circuit includes a plurality of function multiplexing circuits, and each of the plurality of function multiplexing circuits includes a data transmission terminal, an enabling signal terminal, a first signal terminal and a second signal terminal, and is configured to provide a test signal to the data transmission terminal and release static electricity at the data transmission terminal through the first signal terminal or the second signal terminal under control of the enabling signal terminal, the first signal terminal, and the second signal terminal, wherein the data transmission terminal is configured to be connected to at least one data line.

Abstract: An array substrate includes: a base substrate; at least one first connection terminal, at least one second connection terminal, and at least one connection line, which are disposed on the base substrate and located in a non-display area of the array substrate, the at least one connection line being connected with the at least one first connection terminal and the at least one second connection terminal; at least one gate line disposed on the base substrate and located in a display area of the array substrate. The first connection terminal is for connecting with an IC, and the second connection terminal is for connecting with a flexible circuit board. A resistivity of at least a part of each of at least one of the at least one connection line is less than a resistivity of the at least one gate line.

Abstract: A shift register unit includes an input circuit, an output circuit, a pull-down control circuit, and a pull-down circuit. The pull-down control circuit is coupled to a first power supply signal terminal, a second power supply signal terminal, a pull-up node, a pull-down node, and a reset signal terminal. The pull-down control circuit is configured to transmit a first power supply signal from the first power supply signal terminal to the pull-down node under a control of the first power supply signal, transmit the first power supply signal from the first power supply signal terminal to the pull-down node under a control of the reset signal, and transmit a second power supply signal from the second power supply signal terminal to the pull-down node under a control of the pull-up node.

Abstract: An irregular shaped display panel, a method and a device for manufacturing the irregular shaped display panel, and a display device are provided. The irregular shaped display panel includes a display area and a non-display area surrounding the display area. The method for manufacturing an irregular shaped display panel includes: determining, based on an irregular shaped region on the display panel, boundary pixel units located on a boundary of the irregular shaped region; dividing each boundary pixel unit into at least two pixel division units such that each pixel division unit comprises parts of all sub-pixels of the boundary pixel unit; and determining whether a ratio of an area of each pixel division unit outside the display area to an area of the entire pixel division unit reaches a preset value; if yes, performing a shading process on the pixel division unit.

Abstract: The present disclosure relates to a shift register unit. The shift register unit includes a first input circuit configured to transmit a first voltage signal to a pull-up node, a pull-up circuit configured to transmit a first clock signal to a signal output terminal, a first pull-down control circuit configured to transmit a second clock signal to a pull-down node, a second pull-down control circuit configured to transmit a second voltage signal to the pull-down node, a pull-up control circuit configured to transmit the second voltage signal to the pull-up node, a pull-down circuit configured to transmit the second voltage signal to the signal output terminal, and a holding circuit configured to maintain the pull-up node at a low level and/or maintain the pull-down node at a high level under control of a second input.

Abstract: A shift register unit includes an input circuit, an output circuit, a pull-down control circuit, and a pull-down circuit. The pull-down control circuit is coupled to a first power supply signal terminal, a second power supply signal terminal, a pull-up node, a pull-down node, and a reset signal terminal. The pull-down control circuit is configured to transmit a first power supply signal from the first power supply signal terminal to the pull-down node under a control of the first power supply signal, transmit the first power supply signal from the first power supply signal terminal to the pull-down node under a control of the reset signal, and transmit a second power supply signal from the second power supply signal terminal to the pull-down node under a control of the pull-up node.