Patents by Inventor Wen-Yuan Huang

Wen-Yuan Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130057505
    Abstract: An electromagnetic inductive input apparatus includes a signal transmitting device including a signal transmitter, and a signal receiving device. The signal receiving device includes a transparent substrate, first and second sets of transparent conductors disposed on the transparent substrate, and formed as spacedly arranged straight non-loop lines, and a control device electrically coupled to the transparent conductors and operable to detect a detected signal from the transparent conductors, and to determine a position of the signal transmitting device relative to the transparent substrate.
    Type: Application
    Filed: March 28, 2012
    Publication date: March 7, 2013
    Applicant: UC-Logic Technology Corp.
    Inventors: Joe YU, Wen-Yuan HUANG
  • Patent number: 6171732
    Abstract: A method of forming a dual alignment photomask. The method includes the steps of depositing a light-blocking layer over a glass plate, and then patterning the light-blocking layer. Next, a switchable mask layer is deposited over the light-blocking layer and the glass plate, after which the switchable mask layer is patterned. Finally, a protective layer is formed over the switchable mask layer, the light-blocking layer and the glass plate. The switchable mask layer can be changed from a light-passing state to a light-blocking state by simply changing the surrounding temperature. Therefore, through proper setting the temperature, the same photomask can be used to form trenches and vias of dual damascene structures. Thus, some mask-making cost can be saved and errors due to mask misalignment can be avoided.
    Type: Grant
    Filed: May 4, 1999
    Date of Patent: January 9, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Chih-Rong Chen, Wen-Yuan Huang
  • Patent number: 6156655
    Abstract: A retardation layer of a copper damascene process and the fabrication method thereof, to replace the conventional barrier layer with a laminated layer. The laminated layer combines the conventional barrier layer with a porous layer, wherein the porous layer can be formed either above or below the barrier layer to improve the retardation of the copper atom diffusion. Preferably, the porous layer is formed above the barrier layer.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: December 5, 2000
    Assignees: United Microelectronics Corp., United Semiconductor Corp.
    Inventors: Ming-Ching Huang, Chih-Rong Chen, Kuai-Jung Ho, Wen-Yuan Huang, Chi-Chin Yeh
  • Patent number: 6080663
    Abstract: A dual damascene process is provided. A dielectric layer is formed on a substrate having a conductive region. The dielectric layer is selectively doped to form a doped region aligned over the conductive region. The doped region, the dielectric layer underlying the doped region, and another part of the undoped dielectric layer are etched until the conductive region is exposed, so that a dual damascene opening exposing the conductive region and a trench are formed, wherein the dual damascene opening comprising a upper trench and a lower via hole. The dual damascene opening and the trench are filled with a conductive layer.
    Type: Grant
    Filed: November 13, 1998
    Date of Patent: June 27, 2000
    Assignee: United Microelectronics Corp.
    Inventors: Chih-Rong Chen, Wen-Yuan Huang