Patents by Inventor Werner Alois Rausch

Werner Alois Rausch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor structure incorporating thin film transistors, and methods for its manufacture
    Patent number: 6022766
    Abstract: An improved field effect transistor (FET) structure is disclosed. It comprises a first insulator layer containing at least one primary level stud extending through the layer; an undoped cap oxide layer disposed over the insulator layer and abutting the upper region of each stud; a primary level thin film transistor (TFT) disposed over the undoped cap oxide layer; and a planarized oxide layer disposed over the TFT. Multiple TFT's can be stacked vertically, and connected to other levels of studs and metal interconnection layers. Another embodiment of the invention includes the use of a protective interfacial cap over the surface of tungsten-type studs. The FET structure can serve as a component of a static random access memory (SRAM) cell. Related processes are also disclosed.
    Type: Grant
    Filed: February 10, 1997
    Date of Patent: February 8, 2000
    Assignee: International Business Machines, Inc.
    Inventors: Bomy Able Chen, Subhash Balakrishna Kulkarni, Jerome Brett Lasky, Randy William Mann, Edward Joseph Nowak, Werner Alois Rausch, Francis Roger White
  • Field effect transistor having contact layer of transistor gate electrode material
    Patent number: 5757050
    Abstract: Improved field effect transistor (FET) structures are described. They include a thin film transistor (TFT), wherein a contact layer directly connects a diffusion region of the TFT to an active site of another device, e.g., another transistor. This invention is especially suitable for TFT's which are built on one or more conductive studs. Static random access memory (SRAM) cells incorporating one or more of the TFT's are also described. Moreover, this invention is directed to methods for preventing or alleviating the problems associated with gouging during formation of contact layers.
    Type: Grant
    Filed: March 24, 1997
    Date of Patent: May 26, 1998
    Assignee: International Business Machines Corporation
    Inventors: Eric Adler, Subhash Balakrishna Kulkarni, Randy William Mann, Werner Alois Rausch, Luigi Ternullo, Jr.
  • Semiconductor structures which incorporate thin film transistors
    Patent number: 5744384
    Abstract: Improved field effect transistor (FET) structures are described. They include a thin film transistor (TFT), wherein a contact layer directly connects a diffusion region of the TFT to an active site of another device, e.g., another transistor. This invention is especially suitable for TFT's which are built on one or more conductive studs. Static random access memory (SRAM) cells incorporating one or more of the TFT's are also described.Moreover, this invention is directed to methods for preventing or alleviating the problems associated with gouging during formation of contact layers.
    Type: Grant
    Filed: September 19, 1996
    Date of Patent: April 28, 1998
    Assignee: International Business Machines Corporation
    Inventors: Eric Adler, Subhash Balakrishna Kulkarni, Randy William Mann, Werner Alois Rausch, Luigi Ternullo, Jr.
  • Semiconductor structure incorporating thin film transistors with undoped cap oxide layers
    Patent number: 5675185
    Abstract: An improved field effect transistor (FET) structure is disclosed. It comprises a first insulator layer containing at least one primary level stud extending through the layer; an undoped cap oxide layer disposed over the insulator layer and abutting the upper region of each stud; a primary level thin film transistor (TFT) disposed over the undoped cap oxide layer; and a planarized oxide layer disposed over the TFT. Multiple TFT's can be stacked vertically, and connected to other levels of studs and metal interconnection layers. Another embodiment of the invention includes the use of a protective interfacial cap over the surface of tungsten-type studs. The FET structure can serve as a component of a static random access memory (SRAM) cell. Related processes are also disclosed.
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: October 7, 1997
    Assignee: International Business Machines Corporation
    Inventors: Bomy Able Chen, Subhash Balakrishna Kulkarni, Jerome Bret Lasky, Randy William Mann, Edward Joseph Nowak, Werner Alois Rausch, Francis Roger White
  • Field effect transistor having contact layer of transistor gate electrode material
    Patent number: 5670812
    Abstract: Improved field effect transistor (FET) structures are described. They include a thin film transistor (TFT), wherein a contact layer directly connects a diffusion region of the TFT to an active site of another device, e.g., another transistor. This invention is especially suitable for TFT's which are built on one or more conductive studs. Static random access memory (SRAM) cells incorporating one or more of the TFT's are also described. Moreover, this invention is directed to methods for preventing or alleviating the problems associated with gouging during formation of contact layers.
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: September 23, 1997
    Assignee: International Business Machines Corporation
    Inventors: Eric Adler, Subhash Balakrishna Kulkarni, Randy William Mann, Werner Alois Rausch, Luigi Ternullo, Jr.