Abstract: A circuit arrangement for generating an output signal at an output by combining at least a first and a second input signal, includes controllable switches for applying a respective one of the input signals to the output, in which, for the purpose of switching the output from one of the input signals to the other, a first one of the controllable switches is gradually switched from the blocked to the conducting state and a second one of the controllable switches is switched complementarily thereto from the conducting to the blocked state. To implement such a circuit arrangement in such a way that distortions produced by tolerances and inaccuracies in matching the characteristics of the components used for switching can be avoided, while using a small number of components, the controllable switches are switched oppositely to each other between their completely conducting and their completely blocked state with a mutually complementary, gradually changed duty cycle.