Abstract: A converter includes a switched capacitor circuit that includes at least one capacitor and a plurality of main switches to provide an output current in response to an input voltage applied to the switched capacitor circuit. The converter further includes one or more bypass transistor switches to selectively provide an additional output current. The converter includes a common controller that controls the plurality of main switches and the one or more bypass transistor switches.

Abstract: A converter includes a switched capacitor circuit that includes at least one capacitor and a plurality of main switches to provide an output current in response to an input voltage applied to the switched capacitor circuit. The converter further includes one or more bypass transistor switches to selectively provide an additional output current. The converter includes a common controller that controls the plurality of main switches and the one or more bypass transistor switches.

Abstract: Representative implementations of devices and techniques may minimize switching losses and voltage ripple in a switched capacitor de-de converter. A digital controller is used to control switching, based on an existing load. In some examples, the digital controller may insert a dead-time phase in a switching period, which may reduce voltage ripple for a low output load current. In other examples, the digital controller may adjust the conductance of a plurality of sub-switches, where the plurality of sub-switches may include one or more sub-switches that have a higher on-resistance than other sub-switches. For example, a sub-switch may have an on-resistance that is a multiple of the on-resistance of other sub-switches.

Abstract: Representative implementations of devices and techniques may minimize switching losses and voltage ripple in a switched capacitor de-de converter. A digital controller is used to control switching, based on an existing load. In some examples, the digital controller may insert a dead-time phase in a switching period, which may reduce voltage ripple for a low output load current. In other examples, the digital controller may adjust the conductance of a plurality of sub-switches, where the plurality of sub-switches may include one or more sub-switches that have a higher on-resistance than other sub-switches. For example, a sub-switch may have an on-resistance that is a multiple of the on-resistance of other sub-switches.

Abstract: Representative implementations of techniques and/or devices provide control of switching characteristics in a switched capacitor dc-dc converter. In various implementations, the switching characteristics are modified based on load characteristics (e.g., magnitude of the load current). The switching characteristics may be modified to reduce, minimize, or eliminate switching losses in the dc-dc converter.

Abstract: Representative implementations of devices and techniques minimize switching losses in a switched capacitor dc-dc converter. The slope of the charging and/or discharging phase may be modified, smoothing the transitions from charge to discharge and/or discharge to charge of the switched capacitor.

Abstract: Representative implementations of devices and techniques minimize hot carrier stress in a switched capacitor dc-dc converter. Multi-switch arrangements may be used in conjunction with a timing scheme to stage power switch operation.

Abstract: Representative implementations of devices and techniques minimize switching losses in a switched capacitor dc-dc converter. The slope of the charging and/or discharging phase may be modified, smoothing the transitions from charge to discharge and/or discharge to charge of the switched capacitor.

Abstract: Various embodiments described below relate to an ESD protection device that includes a voltage controlled shunt (e.g., a transistor) to selectively shunt energy of an incoming ESD pulse away from a circuit that includes a semiconductor device to be protected. In some embodiments, the ESD protection device includes a power up detection element to determine whether the circuit has powered up. If the circuit is powered up, the power up detection element prevents inadvertent triggering of the ESD protection device.

Abstract: Representative implementations of devices and techniques minimize switching losses in a switched capacitor dc-dc converter. The slope of the charging and/or discharging phase may be modified, smoothing the transitions from charge to discharge and/or discharge to charge of the switched capacitor.

Abstract: Various embodiments described below relate to an ESD protection device that includes a voltage controlled shunt (e.g., a transistor) to selectively shunt energy of an incoming ESD pulse away from a circuit that includes a semiconductor device to be protected. In some embodiments, the ESD protection device includes a power up detection element to determine whether the circuit has powered up. If the circuit is powered up, the power up detection element prevents inadvertent triggering of the ESD protection device.

Abstract: Embodiments of bus interface circuitry and methods for short circuit detection are generally described herein. Other embodiments may be described and claimed. In some embodiments, the bus interface circuitry comprises logic circuitry to compare a driver stage output signal at a bond pad to internal reference voltages to generate control signals indicative of whether a short-circuit condition exists on a bus. The driver stage of the bus interface may be temporarily disabled when a short-circuit condition is indicated by the control signals.

Abstract: A method and apparatus for regulating a dc-dc converter wherein a plurality of switches are arranged with respect to an energy storage device and an output capacitor. An impedance of one or more of the plurality of switches may be adjusted by altering a non-zero voltage provided to the one or more of the plurality of switches, the altering may be based on a slope control signal output by a multiplexer that receives a signal representing a conductance value of the one or more of the plurality of switches.

Abstract: Representative implementations of devices and techniques minimize switching losses in a switched capacitor dc-dc converter. The impedance of one or more switches is adjusted and individual switches are selected for operation based on an existing load.

Abstract: Representative implementations of devices and techniques minimize switching losses in a switched capacitor dc-dc converter. The slope of the charging and/or discharging phase may be modified, smoothing the transitions from charge to discharge and/or discharge to charge of the switched capacitor.

Abstract: Representative implementations of devices and techniques minimize switching losses in a switched capacitor dc-dc converter. A digital controller is used to control switching, based on an existing load.

Abstract: Representative implementations of devices and techniques minimize hot carrier stress in a switched capacitor dc-dc converter. Multi-switch arrangements may be used in conjunction with a timing scheme to stage power switch operation.

Abstract: Various embodiments described below relate to an ESD protection device that includes a voltage controlled shunt (e.g., a transistor) to selectively shunt energy of an incoming ESD pulse away from a circuit that includes a semiconductor device to be protected. In some embodiments, the ESD protection device includes a power up detection element to determine whether the circuit has powered up. If the circuit is powered up, the power up detection element prevents inadvertent triggering of the ESD protection device.

Abstract: This disclosure relates to monitoring and controlling a voltage characteristic of a Drain Extended Metal Oxide Semiconductor (DeMOS) transistor.

Abstract: This disclosure relates to monitoring and controlling a voltage characteristic of a Drain Extended Metal Oxide Semiconductor (DeMOS) transistor.