Abstract: A radio transceiver device comprises a transmit amplifier, a receive amplifier, an impedance matching circuit portion, and an antenna connection node for connection to an antenna. The impedance matching circuit portion is arranged between the antenna connection node and each of the transmit and receive amplifiers. The impedance matching circuit portion comprises a switch and an inductor and is arranged such that, in a receive mode of operation, the switch is first state and incoming signals from the antenna pass to the receive amplifier via the inductor. In a transmit mode of operation, the switch is in a second state and the transmit amplifier is coupled to a power supply rail VDD via the inductor.

Abstract: A voltage divider circuit arrangement includes a resistive divider circuit portion constructed from first and second resistors (R1, R2) The first and second resistors are connected in series and are arranged to provide a refresh voltage (Vrefresh) at a refresh node between them. A capacitive divider circuit portion is constructed from first and second capacitors (C1, C2). The first and second capacitors are connected in series and are arranged to provide an output voltage (Vout) at an output node. A switching circuit portion is arranged intermittently to switch the voltage divider circuit arrangement between a first mode wherein the resistive divider is enabled and the output node is connected to the refresh node, and a second mode wherein the resistive divider is disabled and the output node is not connected to the refresh node.

Abstract: A voltage sampling circuit arrangement comprises: an oscillator circuit portion arranged to produce a periodic oscillator output signal at an oscillation frequency dependent on a bias current provided thereto; a sampling circuit portion arranged selectively to connect an input terminal (Vin) to an output terminal (Vout) in response to an applied switching signal (Vswitch) derived from said oscillator output signal, wherein said sampling circuit portion has a current leakage dependent on temperature; and a biasing circuit portion arranged to provide said bias current to the oscillator circuit portion wherein said bias current is dependent on temperature.

Abstract: A radio transceiver device comprises a transmit amplifier, a receive amplifier, an impedance matching circuit portion, and an antenna connection node for connection to an antenna. The impedance matching circuit portion is arranged between the antenna connection node and each of the transmit and receive amplifiers. The impedance matching circuit portion comprises a switch and an inductor and is arranged such that, in a receive mode of operation, the switch is first state and incoming signals from the antenna pass to the receive amplifier via the inductor. In a transmit mode of operation, the switch is in a second state and the transmit amplifier is coupled to a power supply rail VDD via the inductor.

Abstract: A voltage divider circuit comprises: a resistive divider circuit portion comprising at least first and second resistors (R1, R2), wherein said first and second resistors are connected in series and are arranged to provide a refresh voltage (Vrefresh) at a refresh node therebetween; a capacitive divider circuit portion comprising at least first and second capacitors (C1, C2), wherein said first and second capacitors are connected in series and are arranged to provide an output voltage (Vout) at an output node therebetween; and a switching circuit portion arranged intermittently to switch the voltage divider circuit arrangement between a first mode wherein the resistive divider circuit portion is enabled and the output node is connected to the refresh node, and a second mode wherein the resistive divider circuit portion is disabled and the output node is not connected to the refresh node.

Abstract: A voltage sampling circuit arrangement comprises: an oscillator circuit portion arranged to produce a periodic oscillator output signal at an oscillation frequency dependent on a bias current provided thereto; a sampling circuit portion arranged selectively to connect an input terminal (Vin) to an output terminal (Vout) in response to an applied switching signal (Vswitch) derived from said oscillator output signal, wherein said sampling circuit portion has a current leakage dependent on temperature; and a biasing circuit portion arranged to provide said bias current to the oscillator circuit portion wherein said bias current is dependent on temperature.

Abstract: A temperature sensing device for an integrated circuit comprises an oscillator (2) having a characteristic frequency dependent on the temperature and a digital counter (16) arranged to count a number of pulses generated by the oscillator (2) in a given time interval, or the time taken for the oscillator to generate a given number of pulses. Either of these gives a measured value. The device is configured to use a difference between the measured value and a stored reference value in a linearisation algorithm to estimate a temperature.

Abstract: An integrated-circuit, continuous-time, sigma-delta analog-to-digital converter has a single-ended analog input, a converter reference input, and a ground connection. The converter has a resistor-capacitor integrator arranged to receive the single-ended analog input. The integrator comprises a differential amplifier. The converter also has a clocked comparator connected to an output from the integrator, and circuitry arranged so that reference inputs to the amplifier and to the comparator can be maintained at a common voltage derived from the converter reference input.

Abstract: A temperature sensing device for an integrated circuit comprises an oscillator (2) having a characteristic frequency dependent on the temperature and a digital counter (16) arranged to count a number of pulses generated by the oscillator (2) in a given time interval, or the time taken for the oscillator to generate a given number of pulses. Either of these gives a measured value. The device is configured to use a difference between the measured value and a stored reference value in a linearisation algorithm to estimate a temperature.

Abstract: An integrated-circuit, continuous-time, sigma-delta analogue-to-digital converter has a single-ended analogue input, a converter reference input, and a ground connection. The converter has a resistor-capacitor integrator arranged to receive the single-ended analogue input. The integrator comprises a differential amplifier. The converter also has a clocked comparator connected to an output from the integrator, and circuitry arranged so that reference inputs to the amplifier and to the comparator can be maintained at a common voltage derived from the converter reference input.

Abstract: An integrated-circuit, continuous-time, sigma-delta analogue-to-digital converter has a single-ended analogue input, a converter reference input, and a ground connection. The converter has a resistor-capacitor integrator arranged to receive the single-ended analogue input. The integrator comprises a differential amplifier. The converter also has a clocked comparator connected to an output from the integrator, and circuitry arranged so that reference inputs to the amplifier and to the comparator can be maintained at a common voltage derived from the converter reference input.

Abstract: An integrated-circuit, continuous-time, sigma-delta analogue-to-digital converter has a single-ended analogue input, a converter reference input, and a ground connection. The converter has a resistor-capacitor integrator arranged to receive the single-ended analogue input. The integrator comprises a differential amplifier. The converter also has a clocked comparator connected to an output from the integrator, and circuitry arranged so that reference inputs to the amplifier and to the comparator can be maintained at a common voltage derived from the converter reference input.