Patents by Inventor Werner Reiss
Werner Reiss has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11450642Abstract: A method of making a semiconductor including soldering a conductor to an aluminum metallization is disclosed. In one example, the method includes substituting an aluminum oxide layer on the aluminum metallization by a substitute metal oxide layer or a substitute metal alloy oxide layer. Then, substitute metal oxides in the substitute metal oxide layer or the substitute metal alloy oxide layer are at least partly reduced. The conductor is soldered to the aluminum metallization using a solder material.Type: GrantFiled: December 23, 2020Date of Patent: September 20, 2022Assignee: Infineon Technologies AGInventors: Edmund Riedl, Wu Hu Li, Alexander Heinrich, Ralf Otremba, Werner Reiss
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Publication number: 20210118843Abstract: A method of making a semiconductor including soldering a conductor to an aluminum metallization is disclosed. In one example, the method includes substituting an aluminum oxide layer on the aluminum metallization by a substitute metal oxide layer or a substitute metal alloy oxide layer. Then, substitute metal oxides in the substitute metal oxide layer or the substitute metal alloy oxide layer are at least partly reduced. The conductor is soldered to the aluminum metallization using a solder material.Type: ApplicationFiled: December 23, 2020Publication date: April 22, 2021Applicant: Infineon Technologies AGInventors: Edmund Riedl, Wu Hu Li, Alexander Heinrich, Ralf Otremba, Werner Reiss
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Patent number: 10896893Abstract: A method of making a semiconductor including soldering a conductor to an aluminum metallization is disclosed. In one example, the method includes substituting an aluminum oxide layer on the aluminum metallization by a substitute metal oxide layer or a substitute metal alloy oxide layer. Then, substitute metal oxides in the substitute metal oxide layer or the substitute metal alloy oxide layer are at least partly reduced. The conductor is soldered to the aluminum metallization using a solder material.Type: GrantFiled: March 16, 2020Date of Patent: January 19, 2021Assignee: Infineon Technologies AGInventors: Edmund Riedl, Wu Hu Li, Alexander Heinrich, Ralf Otremba, Werner Reiss
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Patent number: 10892247Abstract: A method of making a semiconductor including soldering a conductor to an aluminum metallization is disclosed. In one example, the method includes substituting an aluminum oxide layer on the aluminum metallization by a substitute metal oxide layer or a substitute metal alloy oxide layer. Then, substitute metal oxides in the substitute metal oxide layer or the substitute metal alloy oxide layer are at least partly reduced. The conductor is soldered to the aluminum metallization using a solder material.Type: GrantFiled: March 16, 2020Date of Patent: January 12, 2021Assignee: Infineon Technologies AGInventors: Edmund Riedl, Wu Hu Li, Alexander Heinrich, Ralf Otremba, Werner Reiss
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Patent number: 10777536Abstract: Embodiments of chip-package and corresponding methods of manufacture are provided. In an embodiment of a chip-package, the chip-package includes: a carrier having a first side and a second side opposing the first side; a first chip coupled to the first side of the carrier; a second chip coupled to the second side of the carrier; an encapsulation with a first portion, which at least partially encloses the first chip on the first side of the carrier, and a second portion, which at least partially encloses the second chip on the second side of the carrier; a via extending through the first portion of the encapsulation, the carrier and the second portion of the encapsulation; and an electrically conductive material at least partly covering a sidewall of the via in the first portion or the second portion of the encapsulation, to electrically contact the carrier at either side.Type: GrantFiled: December 7, 2018Date of Patent: September 15, 2020Assignee: Infineon Technologies AGInventors: Chau Fatt Chiang, April Coleen Tuazon Bernardez, Junny Abdul Wahid, Roslie Saini bin Bakar, Kon Hoe Chin, Hock Heng Chong, Kok Yau Chua, Hsieh Ting Kuek, Chee Hong Lee, Soon Lee Liew, Nurfarena Othman, Pei Luan Pok, Werner Reiss, Stefan Schmalzl
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Publication number: 20200243480Abstract: A method of making a semiconductor including soldering a conductor to an aluminum metallization is disclosed. In one example, the method includes substituting an aluminum oxide layer on the aluminum metallization by a substitute metal oxide layer or a substitute metal alloy oxide layer. Then, substitute metal oxides in the substitute metal oxide layer or the substitute metal alloy oxide layer are at least partly reduced. The conductor is soldered to the aluminum metallization using a solder material.Type: ApplicationFiled: March 16, 2020Publication date: July 30, 2020Applicant: Infineon Technologies AGInventors: Edmund Riedl, Wu Hu Li, Alexander Heinrich, Ralf Otremba, Werner Reiss
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Publication number: 20200219841Abstract: A method of making a semiconductor including soldering a conductor to an aluminum metallization is disclosed. In one example, the method includes substituting an aluminum oxide layer on the aluminum metallization by a substitute metal oxide layer or a substitute metal alloy oxide layer. Then, substitute metal oxides in the substitute metal oxide layer or the substitute metal alloy oxide layer are at least partly reduced. The conductor is soldered to the aluminum metallization using a solder material.Type: ApplicationFiled: March 16, 2020Publication date: July 9, 2020Applicant: Infineon Technologies AGInventors: Edmund Riedl, Wu Hu Li, Alexander Heinrich, Ralf Otremba, Werner Reiss
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Publication number: 20200185293Abstract: Embodiments of molded packages and corresponding methods of manufacture are provided. In an embodiment of a molded package, the molded package includes a laser-activatable mold compound having a plurality of laser-activated regions which are plated with an electrically conductive material to form metal pads and/or metal traces at a first side of the laser-activatable mold compound. A semiconductor die embedded in the laser-activatable mold compound has a plurality of die pads. An interconnect electrically connects the plurality of die pads of the semiconductor die to the metal pads and/or metal traces at the first side of the laser-activatable mold compound.Type: ApplicationFiled: December 7, 2018Publication date: June 11, 2020Inventors: Stefan Schmalzl, Chau Fatt Chiang, Werner Reiss
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Patent number: 10615145Abstract: A method of making a semiconductor including soldering a conductor to an aluminum metallization is disclosed. In one example, the method includes substituting an aluminum oxide layer on the aluminum metallization by a substitute metal oxide layer or a substitute metal alloy oxide layer. Then, substitute metal oxides in the substitute metal oxide layer or the substitute metal alloy oxide layer are at least partly reduced. The conductor is soldered to the aluminum metallization using a solder material.Type: GrantFiled: July 16, 2018Date of Patent: April 7, 2020Assignee: Infineon Technologies AGInventors: Edmund Riedl, Wu Hu Li, Alexander Heinrich, Ralf Otremba, Werner Reiss
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Patent number: 10505255Abstract: A semiconductor device package includes a radio frequency front end circuit configured to process radio frequency signals, a first antenna, an antenna substrate, and a first conductive barrier. The first antenna is configured to transmit/receive a first radio frequency signal. The antenna substrate includes the first antenna. The antenna substrate is configured to transfer the first radio frequency signal between the radio frequency front end circuit and the first antenna. The first conductive barrier is configured to electromagnetically and electrostatically isolate the first antenna.Type: GrantFiled: January 30, 2017Date of Patent: December 10, 2019Assignee: INFINEON TECHNOLOGIES AGInventors: Ashutosh Baheti, Saverio Trotta, Werner Reiss
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Publication number: 20190181120Abstract: Embodiments of chip-package and corresponding methods of manufacture are provided. In an embodiment of a chip-package, the chip-package includes: a carrier having a first side and a second side opposing the first side; a first chip coupled to the first side of the carrier; a second chip coupled to the second side of the carrier; an encapsulation with a first portion, which at least partially encloses the first chip on the first side of the carrier, and a second portion, which at least partially encloses the second chip on the second side of the carrier; a via extending through the first portion of the encapsulation, the carrier and the second portion of the encapsulation; and an electrically conductive material at least partly covering a sidewall of the via in the first portion or the second portion of the encapsulation, to electrically contact the carrier at either side.Type: ApplicationFiled: December 7, 2018Publication date: June 13, 2019Inventors: Chau Fatt Chiang, April Coleen Tuazon Bernardez, Junny Abdul Wahid, Roslie Saini bin Bakar, Kon Hoe Chin, Hock Heng Chong, Kok Yau Chua, Hsieh Ting Kuek, Chee Hong Lee, Soon Lee Liew, Nurfarena Othman, Pei Luan Pok, Werner Reiss, Stefan Schmalzl
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Publication number: 20190035764Abstract: A method of making a semiconductor including soldering a conductor to an aluminum metallization is disclosed. In one example, the method includes substituting an aluminum oxide layer on the aluminum metallization by a substitute metal oxide layer or a substitute metal alloy oxide layer. Then, substitute metal oxides in the substitute metal oxide layer or the substitute metal alloy oxide layer are at least partly reduced. The conductor is soldered to the aluminum metallization using a solder material.Type: ApplicationFiled: July 16, 2018Publication date: January 31, 2019Applicant: Infineon Technologies AGInventors: Edmund Riedl, Wu Hu Li, Alexander Heinrich, Ralf Otremba, Werner Reiss
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Publication number: 20180219272Abstract: A semiconductor device package includes a radio frequency front end circuit configured to process radio frequency signals, a first antenna, an antenna substrate, and a first conductive barrier. The first antenna is configured to transmit/receive a first radio frequency signal. The antenna substrate includes the first antenna. The antenna substrate is configured to transfer the first radio frequency signal between the radio frequency front end circuit and the first antenna. The first conductive barrier is configured to electromagnetically and electrostatically isolate the first antenna.Type: ApplicationFiled: January 30, 2017Publication date: August 2, 2018Inventors: Ashutosh Baheti, Saverio Trotta, Werner Reiss
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Patent number: 9935065Abstract: A semiconductor device package includes an integrated circuit chip comprising a radio frequency device. The radio frequency device includes active circuitry at a first surface of the integrate circuit chip. An antenna substrate is disposed over the first surface of the integrated circuit. The antenna substrate includes a first conductive layer disposed over the first surface of the integrated circuit chip. The first conductive layer includes a first transmission line electrically coupled to the integrated circuit chip. A first laminate layer is disposed over the first conductive layer. The first laminate layer overlaps a first part of the first transmission line. A second conductive layer is disposed over the first laminate layer. The second conductive layer includes a first opening overlapping a second part of the first transmission line. A second laminate layer is disposed over the second conductive layer.Type: GrantFiled: December 21, 2016Date of Patent: April 3, 2018Assignee: Infineon Technologies AGInventors: Ashutosh Baheti, Saverio Trotta, Werner Reiss
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Publication number: 20110162204Abstract: An integrated device is disclosed. In one embodiment, the integrated device includes a carrier substrate with a through hole and a contact sleeve. A circuit chip is provided with a contact pad above the carrier substrate. A conductive material electrically connects the contact pad to the contact sleeve.Type: ApplicationFiled: March 17, 2011Publication date: July 7, 2011Applicant: QIMONDA AGInventors: Werner Reiss, Wolfgang Hetzel, Florian Ammer
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Publication number: 20110079242Abstract: Methods and apparatus for cleaning impurities, such as oxides, from wire stands using a plasma gas.Type: ApplicationFiled: October 7, 2009Publication date: April 7, 2011Inventor: Werner REISS
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Publication number: 20080064232Abstract: An integrated device is disclosed. In one embodiment, the integrated device includes a carrier substrate with a through hole and a contact sleeve. A circuit chip is provided with a contact pad above the carrier substrate. A conductive material electrically connects the contact pad to the contact sleeve.Type: ApplicationFiled: April 30, 2007Publication date: March 13, 2008Applicant: Qimonda AGInventors: Werner Reiss, Wolfgang Hetzel, Florian Ammer
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Patent number: 7265441Abstract: A stackable packaged chip includes a substrate with a conductive wiring formed therein or thereon. The substrate further includes a plurality of substrate contact pads arranged around a periphery portion of the substrate. A chip mounted on the substrate including contact pads that are electrically connected with the conductive wiring of the substrate, and a ring surrounding edges of the chip are also included. The ring is formed from an electrically insulating material and includes a plurality of openings, each opening adjacent a substrate contact pad to allow for electrical connection to the chip though the substrate contact pad.Type: GrantFiled: August 15, 2005Date of Patent: September 4, 2007Assignee: Infineon Technologies AGInventors: Werner Reiss, Wolfgang Hetzel
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Publication number: 20070090527Abstract: The present invention relates to an integrated chip device in a package, including an integrated chip, a substrate comprising a redistribution wiring, a contact element and a contact pad on a common surface of the substrate, wherein the contact element is in electrical contact with the contact pad, wherein the substrate is divided in at least two parts each of which is securely attached to a respective portion of the chip to form the device, wherein between at least two of the parts of the substrate a gap is provided to accommodate a thermal expansion of at least one of the parts of the substrate, a bond wire which is provided to connect the contact pad and the further contact pad of the substrate with the integrated chip through the gap.Type: ApplicationFiled: September 30, 2005Publication date: April 26, 2007Inventors: Jochen Thomas, Steffen Kroehnert, Wolfgang Hetzel, Werner Reiss
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Publication number: 20070035006Abstract: A stackable packaged chip includes a substrate with a conductive wiring formed therein or thereon. The substrate further includes a plurality of substrate contact pads arranged around a periphery portion of the substrate. A chip mounted on the substrate including contact pads that are electrically connected with the conductive wiring of the substrate, and a ring surrounding edges of the chip are also included. The ring is formed from an electrically insulating material and includes a plurality of openings, each opening adjacent a substrate contact pad to allow for electrical connection to the chip though the substrate contact pad.Type: ApplicationFiled: August 15, 2005Publication date: February 15, 2007Inventors: Werner Reiss, Wolfgang Hetzel