Abstract: The system and method of the present invention for reducing the clock skew sensitivity of a shift register provides a control circuit for generating a clock signal to the first cell of the shift register. The first cell of the shift register receives the clock signal at its input and delays the clock signal for a specified time before transmitting the clock signal to the last cell in the shift register. The clock signal is propagated from the first cell of the shift register to the last cell of the shift register in a first direction. A test data circuit line is coupled to the last cell of the shift register. A test data signal is transmitted by the test data circuit line to the last cell of the shift register and is propagated through the shift register in a second direction, wherein the second direction is in a direction opposite from the direction of the clock signal.

Abstract: A bundled light beam projected by a light source (21), particularly a laser light source, onto the target is partly reflected back into the measuring apparatus (20), focussed by a concave mirror (61, 81) and split by a beam splitter (26) into two partial beams (25,25'), where the light detectors (28,28'), which in one dimension are at least as long as the partial beams, are arranged at different distances from the beam splitter (26). A linear dependence between the quotient signal and the distance (15) from the measuring apparatus (2) to the target (11) results from the quotient of the detector signals.