Patents by Inventor Werner Schoegler
Werner Schoegler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12164348Abstract: A system includes a first reset capture register configured to receive a plurality of reset signals, a last reset capture register configured to receive the plurality of reset signals, and a reset control circuit. The reset control circuit is configured to perform a startup procedure in response to assertion of a first reset signal of the plurality of rest signals. The startup procedure beings with a start state and ends in an active state in which the system operates in normal operation, and the first reset signal is asserted while the system is in the active state. The first reset capture register is configured to capture a first state of the plurality of reset signals in response to assertion of the first reset signal, and the last reset capture register is configured to capture a final state of the plurality of reset signals prior to completing the startup procedure.Type: GrantFiled: October 4, 2022Date of Patent: December 10, 2024Assignee: NXP USA, Inc.Inventor: Werner Schoegler
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Publication number: 20240111345Abstract: A system includes a first reset capture register configured to receive a plurality of reset signals, a last reset capture register configured to receive the plurality of reset signals, and a reset control circuit. The reset control circuit is configured to perform a startup procedure in response to assertion of a first reset signal of the plurality of rest signals. The startup procedure beings with a start state and ends in an active state in which the system operates in normal operation, and the first reset signal is asserted while the system is in the active state. The first reset capture register is configured to capture a first state of the plurality of reset signals in response to assertion of the first reset signal, and the last reset capture register is configured to capture a final state of the plurality of reset signals prior to completing the startup procedure.Type: ApplicationFiled: October 4, 2022Publication date: April 4, 2024Inventor: Werner Schoegler
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Patent number: 10842286Abstract: An electrically adjustable piece of furniture comprises a first and at least one second actuator for adjusting a component of the piece of furniture and a controller for controlling the first and at least one second actuator. The actuators each have a first element and a second element which are displaceable relative to each other, and a sensor attached to the first element and adapted to measure a distance between the first and second elements. The distance measurement is based on a time-of-flight measurement of a wave. The controller is arranged to determine an absolute position of each actuator from the respectively measured distance.Type: GrantFiled: February 22, 2019Date of Patent: November 24, 2020Assignee: LOGICDATA Electronic & Software Entwicklungs GmbHInventors: Stefan Lukas, Werner Schoegler
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Publication number: 20190261778Abstract: An electrically adjustable piece of furniture comprises a first and at least one second actuator for adjusting a component of the piece of furniture and a controller for controlling the first and at least one second actuator. The actuators each have a first element and a second element which are displaceable relative to each other, and a sensor attached to the first element and adapted to measure a distance between the first and second elements. The distance measurement is based on a time-of-flight measurement of a wave. The controller is arranged to determine an absolute position of each actuator from the respectively measured distance.Type: ApplicationFiled: February 22, 2019Publication date: August 29, 2019Inventors: Stefan LUKAS, Werner SCHOEGLER
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Patent number: 9736896Abstract: A driver assembly (100) for a lighting unit (230) comprises a control unit (110). The lighting unit (230) comprises a plurality of strands (240, 250, 260), wherein each strand comprises a series circuit (242, 252, 262) of light-emitting diodes and a current source (243, 253, 263) with a first and a second terminal (246, 256, 266), and wherein the series circuit (242, 252, 262) of diodes is connected between a supply voltage input (231) of the lighting unit (230) and the first terminal of the current source (243, 253, 263) and the second terminal (246, 256, 266) of the current source is connected to a reference potential terminal via a resistor (245, 255, 265).Type: GrantFiled: May 29, 2012Date of Patent: August 15, 2017Assignee: AMS AGInventors: Manfred Pauritsch, Werner Schögler, Stefan Wiegele
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Patent number: 9372122Abstract: An electronic circuit (10) to monitor a temperature of a light emitting diode (1) comprises a current generating circuit (110) to generate a current flow of at least a first and second current (IC1, IC2) through the light emitting diode (1) and a voltage monitoring circuit (120) to monitor a voltage of the light emitting diode (1). The voltage monitoring circuit (120) is further arranged to determine a difference of a respective value of a first and second voltage (Vf1, Vf2) of the light emitting diode (1) to monitor the temperature of the light emitting diode (1), wherein the first voltage (Vf1) and second voltage (Vf2) of the light emitting diode (1) is determined while driving the first and second current (IC2) through the light emitting diode (1).Type: GrantFiled: June 18, 2013Date of Patent: June 21, 2016Assignee: AMS AGInventors: Manfred Pauritsch, Werner Schögler
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Patent number: 9307605Abstract: In one embodiment, an electronic lighting system comprises a first light source (L1) adapted to emit light with a first brightness as a function of a first driving signal (PWM1) having a first frequency (f1), at least one second light source (L2) having a main light sensor (Als2) for providing an brightness of light surrounding the second light source (L2), wherein the first light source (L1) is arranged in visual connection with the at least one second light source (L2). Thereby, the second light source (L2) is prepared to emit light with a second brightness as a function of a second driving signal (PWM2) with a second frequency (f2), the second frequency (f2) of the second driving signal (PWM2) being adjusted to a light frequency (fL) of the light emitted by the first light source (L1), the light frequency (fL) being detected by means of the main light sensor (Als2). Furthermore, a method for lighting synchronization is described.Type: GrantFiled: November 29, 2013Date of Patent: April 5, 2016Assignee: ams AGInventors: Werner Schoegler, Manfred Pauritsch
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Publication number: 20150359063Abstract: In one embodiment, an electronic lighting system comprises a first light source (L1) adapted to emit light with a first brightness as a function of a first driving signal (PWM1) having a first frequency (f1), at least one second light source (L2) having a main light sensor (Als2) for providing an brightness of light surrounding the second light source (L2), wherein the first light source (L1) is arranged in visual connection with the at least one second light source (L2). Thereby, the second light source (L2) is prepared to emit light with a second brightness as a function of a second driving signal (PWM2) with a second frequency (f2), the second frequency (f2) of the second driving signal (PWM2) being adjusted to a light frequency (fL) of the light emitted by the first light source (L1), the light frequency (fL) being detected by means of the main light sensor (Als2). Furthermore, a method for lighting synchronization is described.Type: ApplicationFiled: November 29, 2013Publication date: December 10, 2015Inventors: Werner SCHOEGLER, Manfred PAURITSCH
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Publication number: 20140225508Abstract: A driver assembly (100) for a lighting unit (230) comprises a control unit (110). The lighting unit (230) comprises a plurality of strands (240, 250, 260), wherein each strand comprises a series circuit (242, 252, 262) of light-emitting diodes and a current source (243, 253, 263) with a first and a second terminal (246, 256, 266), and wherein the series circuit (242, 252, 262) of diodes is connected between a supply voltage input (231) of the lighting unit (230) and the first terminal of the current source (243, 253, 263) and the second terminal (246, 256, 266) of the current source is connected to a reference potential terminal via a resistor (245, 255, 265).Type: ApplicationFiled: May 29, 2012Publication date: August 14, 2014Applicant: AMS AGInventors: Manfred Pauritsch, Werner Schögler, Stefan Wiegele
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Publication number: 20130336360Abstract: An electronic circuit (10) to monitor a temperature of a light emitting diode (1) comprises a current generating circuit (110) to generate a current flow of at least a first and second current (IC1, IC2) through the light emitting diode (1) and a voltage monitoring circuit (120) to monitor a voltage of the light emitting diode (1). The voltage monitoring circuit (120) is further arranged to determine a difference of a respective value of a first and second voltage (Vf1, Vf2) of the light emitting diode (1) to monitor the temperature of the light emitting diode (1), wherein the first voltage (Vf1) and second voltage (Vf2) of the light emitting diode (1) is determined while driving the first and second current (IC2) through the light emitting diode (1).Type: ApplicationFiled: June 18, 2013Publication date: December 19, 2013Inventors: Manfred PAURITSCH, Werner SCHÖGLER
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Patent number: 8352753Abstract: A microcontroller comprises a microprocessor (1), a test interface (4) and an internal non-erasable memory (2). First control means (6) are provided which are able to activate and deactivate the test interface (4), and second control means (7) are provided which are able to activate and deactivate the internal non-erasable memory (2). The microprocessor (1) of the microcontroller comprises control outputs (101) which are connected with the first and second control means (6, 7). With appropriate timing of activation and deactivation of the test interface (4) and the internal non-erasable memory (2), the microcontroller offers the possibility of preventing an unauthorized access to contents of the internal non-erasable memory (2) without limiting the usability of the test interface (4) for the development of application programs.Type: GrantFiled: September 7, 2007Date of Patent: January 8, 2013Assignee: Austriamicrosystems AGInventors: Werner Schoegler, Michael Böhm
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Patent number: 7836240Abstract: An interface arrangement (24) is disclosed that provides an interface between a signal line (5) for connecting external peripheral devices and a microcontroller bus (3). Data input and output interfaces (1, 2; 4) are provided for connecting corresponding register units (6, 7) to the bus systems (3, 5) and are connected through a buffer memory (8). This is, moreover, coupled with a direct memory access (DMA) controller (9). A control signal generator is also provided for the flexible generation of control signals (10). The proposed arrangement thus permits a high data transfer rate when operating peripheral devices with a system-on-chip, without demanding computing time from the microcontroller.Type: GrantFiled: June 6, 2006Date of Patent: November 16, 2010Assignee: Austriamicrosystems AGInventor: Werner Schoegler
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Publication number: 20100146302Abstract: A microcontroller comprises a microprocessor (1), a test interface (4) and an internal non-erasable memory (2). First control means (6) are provided which are able to activate and deactivate the test interface (4), and second control means (7) are provided which are able to activate and deactivate the internal non-erasable memory (2). The microprocessor (1) of the microcontroller comprises control outputs (101) which are connected with the first and second control means (6, 7). With appropriate timing of activation and deactivation of the test interface (4) and the internal non-erasable memory (2), the microcontroller offers the possibility of preventing an unauthorized access to contents of the internal non-erasable memory (2) without limiting the usability of the test interface (4) for the development of application programs.Type: ApplicationFiled: September 7, 2007Publication date: June 10, 2010Applicant: AUSTRIAMICROSYSTEMS AGInventors: Werner Schoegler, Michael Böhm
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Publication number: 20090125663Abstract: An interface arrangement (24) is disclosed that provides an interface between a signal line (5) for connecting external peripheral devices and a microcontroller bus (3). Data input and output interfaces (1, 2; 4) are provided for connecting corresponding register units (6, 7) to the bus systems (3, 5) and are connected through a buffer memory (8). This is, moreover, coupled with a direct memory access (DMA) controller (9). A control signal generator is also provided for the flexible generation of control signals (10). The proposed arrangement thus permits a high data transfer rate when operating peripheral devices with a system-on-chip, without demanding computing time from the microcontroller.Type: ApplicationFiled: June 6, 2006Publication date: May 14, 2009Inventor: Werner Schoegler