Abstract: A silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) and a method for forming a SiC MOSFET are disclosed. In an example, the method includes forming a gate dielectric that adjoins a body region arranged in a semiconductor body, and forming a gate electrode on the gate dielectric. Forming the gate electrode includes forming a first electrode layer, implanting work function adjusting atoms into the first electrode layer, and forming a second electrode layer on the first electrode layer.

Abstract: A silicon carbide device includes a silicon carbide body having a first doped region and a second doped region. The first doped region is n doped and the second doped region is p doped. A first interface layer in direct contact with the first doped region includes a first metal silicide/carbide containing a first transition metal. A first buffer layer is formed directly on the first interface layer. A second interface layer in direct contact with the second doped region includes a second metal silicide/carbide containing a second refractory metal. The second interface layer is formed along at least a lower sidewall portion of a trench that extends from a first surface into the silicon carbide body.

Abstract: A method of forming a laterally varying dopant concentration profile of an electrically activated dopant in a power semiconductor device includes: providing a semiconductor body; implanting a dopant to form a doped region in the semiconductor body; providing, above the doped region, a mask layer having a first section and a second section, the first section having has a first thickness along a vertical direction and the second section having a second thickness along the vertical direction, the second thickness being different from the first thickness; and subjecting the doped region and both mask sections to a laser thermal annealing, LTA, processing step.

Abstract: A method of manufacturing a semiconductor device includes forming a trench that extends from a first surface into a silicon carbide body. A first doped region and an oppositely doped second doped region are formed in the silicon carbide body. A lower layer structure is formed on a lower sidewall portion of the trench. An upper layer stack is formed on an upper sidewall portion and/or on the first surface. The first doped region and the upper layer stack are in direct contact along the upper sidewall portion and/or on the first surface. The second doped region and the lower layer structure are in direct contact along the lower sidewall portion.

Abstract: A method of manufacturing semiconductor devices includes processing a semiconductor body at a first surface of the semiconductor body, including forming a wiring area over the first surface. Thereafter, the method further includes forming a field stop region in the semiconductor body. Forming the field stop region includes introducing implant ions including selenium into the semiconductor body through a second (opposite) surface of the semiconductor body by an ion implantation process. A main beam direction of the ion implantation process deviates from a main crystal direction of the semiconductor body, along which channeling of implant ions occurs, by at most 1 degree and a main beam incidence angle divergence is at most ±0.5 degree. Forming the field stop region further includes electrically activating at least part of the selenium by a laser annealing process.

Abstract: A semiconductor device includes: a semiconductor body having a first surface and a second surface; a plurality of semiconductor device elements in the semiconductor body at the first surface; a wiring area over the first surface of the semiconductor body; and an impurity in the semiconductor body. A profile of concentration of the impurity has a penetration depth from the second surface into the semiconductor body along a vertical direction. The profile of concentration has a concentration plateau along a vertical segment ranging from 30% to 70% of the penetration depth, the plateau having a fluctuation of the concentration of less than 20%.

Abstract: A method of forming a semiconductor device is proposed. The method includes forming a doped region of a first conductivity type in a SiC semiconductor body. Forming the doped region includes introducing dopants of the first conductivity type into the SiC semiconductor body by at least one ion implantation process. Forming the doped region further includes introducing dopants of the first conductivity type into the SiC semiconductor body by at least one plasma doping process. A penetration depth of the dopants introduced by the at least one ion implantation process is larger than a penetration depth of the dopants introduced by the at least one plasma doping process. The method further includes forming a contact material on a contact surface portion of the doped region. The contact surface portion includes the dopants introduced by at least plasma doping process.

Abstract: A method of manufacturing a semiconductor device in a semiconductor body having a first surface and a second surface is proposed. Semiconductor device elements are formed in the semiconductor body by processing the semiconductor body at the first surface. A wiring area is formed over the first surface of the semiconductor body. The semiconductor body is attached to a carrier via the wiring area. Thereafter, ions are implanted through the second surface into the semiconductor body. The ions are ions of a doping element, or ions, which induce doping by complex formation, or ions of a heavy metal. A surface region of the semiconductor body at the second surface is irradiated with a plurality of laser pulses. Thereafter, the carrier is removed from the semiconductor body.

Abstract: A method of manufacturing a metal silicide layer comprises performing laser thermal annealing of a surface region of a silicon carbide (SiC) substrate, exposing a surface of a thus obtained silicon layer, depositing a metal layer above the exposed silicon layer, and/or thermally treating a stack of layers, comprising the silicon layer and the metal layer, to form a metal silicide layer. Alternatively and/or additionally, the method may comprise depositing a silicon layer above a SiC substrate, depositing a metal layer, and/or performing laser thermal annealing of the SiC substrate and a stack of layers above the SiC substrate to form a metal silicide layer, wherein the stack of layers comprises the silicon layer and the metal layer. Moreover, a semiconductor device is described, comprising a SiC substrate, a metal silicide layer, and a polycrystalline layer in direct contact with the SiC substrate and the metal silicide layer.

Abstract: The present disclosure relates to methods of manufacturing Ohmic contacts on a silicon carbide (SiC) substrate including providing a 4H—SiC or 6H—SiC substrate, implanting dopants into a surface region of the 4H—SiC or 6H—SiC substrate, annealing the implanted surface regions to form a 3C—SiC layer, and depositing a metal layer on the 3C—SiC layer. An implanting sequence of the implantation of dopants includes a plurality of plasma deposition acts with implantation energy levels including at least two different implantation energy levels. The implantation energy levels and one or more implantation doses of the plurality of plasma deposition acts are selected to form a 3C—SiC layer in the surface region of the 4H—SiC or 6H—SiC substrate during the annealing act.

Abstract: The application relates to a semiconductor power device including a semiconductor body in which a transistor device is formed, the transistor device having a gate region and a channel region laterally aside the gate region, the gate region including a gate electrode for controlling a channel formation in the channel region, and a gate dielectric laterally between the channel region and the gate electrode. The gate electrode includes a gate electrode bulk region and a gate electrode layer laterally between the gate dielectric and the gate electrode bulk region. The gate electrode layer is made of a doped metallically conductive material.

Abstract: A method of manufacturing a semiconductor device includes forming a doped region in a semiconductor body. Forming the doped region includes: introducing first dopants through a first surface of the semiconductor body at a first vertical reference level by a first ion implantation process; thereafter, applying a first heat treatment to the semiconductor body; and thereafter, introducing second dopants through the first surface of the semiconductor body at the first vertical reference level by a second ion implantation process. An atomic number of the first dopants is equal to an atomic number of the second dopants. An ion implantation energy of the second ion implantation process differs by less than 20% from an ion implantation energy of the first ion implantation process. An ion implantation dose of the second ion implantation process differs by less than 20% from an ion implantation dose of the first ion implantation process.

Abstract: A method includes orienting a silicon carbide layer to a first crystal channel direction relative to a first ion beam and implanting phosphorous into the silicon carbide layer using the first ion beam to define a first doped region in the silicon carbide layer. A deviation angle between the first crystal channel direction and the first ion beam is less than ±1° and the first crystal channel direction comprises a <0001> direction or a <11-23> direction.

Abstract: A vertical power semiconductor device includes a silicon carbide (SiC) semiconductor body having a first surface and a second surface opposite to each other along a vertical direction. The SiC semiconductor body includes at least one SiC semiconductor layer on a SiC semiconductor substrate. A pn junction is formed in the at least one SiC semiconductor layer. A first load electrode is arranged over the first surface. The vertical power semiconductor device further includes a plurality of first trenches extending into the SiC semiconductor substrate from the second surface. A second load electrode is arranged over the second surface. The second load electrode is electrically connected to the SiC semiconductor substrate via one or more sidewalls of the plurality of first trenches.

Abstract: The disclosure relates to a method for manufacturing a contact on a SiC substrate, wherein the method includes: providing a crystalline SiC substrate; modifying a crystal structure in a surface area of the SiC substrate such that a carbon-enriched SiC portion is generated in the surface area; forming a contact layer on the SiC substrate by depositing a metallic contact material onto the surface area that includes the carbon-enriched SiC portion; and thermal annealing of at least a part of the carbon-enriched SiC portion of the SiC substrate and at least a part of the contact layer, such that a ternary metallic phase portion including at least the metallic contact material, silicon, and carbon is generated. Furthermore, SiC semiconductor devices are described, which include a crystalline SiC substrate and a contact layer including a ternary metallic phase portion directly in contact with the SiC substrate surface.

Abstract: A method of manufacturing a semiconductor device in a semiconductor body having a first surface and a second surface is proposed. Semiconductor device elements are formed in the semiconductor body by processing the semiconductor body at the first surface. A wiring area is formed over the first surface of the semiconductor body. The semiconductor body is attached to a carrier via the wiring area. Thereafter, ions are implanted through the second surface into the semiconductor body. The ions are ions of a doping element, or ions, which induce doping by complex formation, or ions of a heavy metal. A surface region of the semiconductor body at the second surface is irradiated with a plurality of laser pulses. Thereafter, the carrier is removed from the semiconductor body.

Abstract: A silicon carbide substrate is provided that includes a drift layer of a first conductivity type and a trench extending from a main surface of the silicon carbide substrate into the drift layer. First dopants are implanted through a first trench sidewall of the trench. The first dopants have a second conductivity type and are implanted at a first implant angle into the silicon carbide substrate, wherein at the first implant angle channeling occurs in the silicon carbide substrate. The first dopants form a first compensation layer extending parallel to the first trench sidewall.

Abstract: A method for fabricating a semiconductor device includes: forming a trench in a first major surface of a semiconductor body having a first conductivity type; forming a gate in the trench; forming a body region of a second conductivity type in the semiconductor body; implanting a second dopant species into a first region of the body region and a first dopant species into a second region of the body region, the first dopant species providing the first conductivity type, the second dopant species being different from the first dopant species and reducing the diffusion of the first dopant species in the semiconductor body; and thermally annealing the semiconductor body to form a source region that includes the first and second dopant species, and to produce a pn-junction between the source and body regions at a depth dpn from the first major surface, wherein 50 nm<dpn<300 nm.

Abstract: A method of manufacturing a semiconductor device includes forming a trench that extends from a first surface into a silicon carbide body. A first doped region and an oppositely doped second doped region are formed in the silicon carbide body. A lower layer structure is formed on a lower sidewall portion of the trench. An upper layer stack is formed on an upper sidewall portion and/or on the first surface. The first doped region and the upper layer stack are in direct contact along the upper sidewall portion and/or on the first surface. The second doped region and the lower layer structure are in direct contact along the lower sidewall portion.

Abstract: A semiconductor device includes a semiconductor substrate and a metal nitride layer above the semiconductor substrate. The metal nitride layer forms at least one interface region with the semiconductor substrate. The at least one interface region includes a first portion of the semiconductor substrate, a first portion of the metal nitride layer, and an interface between the first portion of the semiconductor substrate and the first portion of the metal nitride layer. A concentration of nitrogen content at the first portion of the metal nitride layer is higher than a concentration of nitrogen content at a second portion, of the metal nitride layer, outside the interface region. A distribution of nitrogen content throughout the metal nitride layer may have a maximum concentration at the first portion of the metal nitride layer. Alternatively and/or additionally, a method for producing such a semiconductor device is provided herein.