Patents by Inventor Wesam Ibraheem

Wesam Ibraheem has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170132346
    Abstract: Techniques for modifying a circuit are described herein. In some examples, a method includes generating a set of testing data and detecting a predetermined modification to a translation path corresponding to a memory address mapping, the predetermined modification to change a physical memory address of the testing data associated with a virtual memory address to a second physical memory address of the testing data. The method can also include generating a test template comprising a first instruction to implement the predetermined modification and a second instruction comprising the second physical memory address in the translation path and transmitting the test template to the circuit for each of a plurality of software instruction threads. Furthermore, the method can include detecting a defect in the execution of the test template by the circuit and modifying the circuit to prevent the defect during execution of the test template.
    Type: Application
    Filed: November 10, 2015
    Publication date: May 11, 2017
    Inventors: WESAM IBRAHEEM, TOM KOLAN, ANATOLY KOYFMAN, RONNY MORAD, VITALI SOKHIN, ELENA TSANKO
  • Patent number: 9633155
    Abstract: Techniques for modifying a circuit are described herein. In some examples, a method includes generating a set of testing data and detecting a predetermined modification to a translation path corresponding to a memory address mapping, the predetermined modification to change a physical memory address of the testing data associated with a virtual memory address to a second physical memory address of the testing data. The method can also include generating a test template comprising a first instruction to implement the predetermined modification and a second instruction comprising the second physical memory address in the translation path and transmitting the test template to the circuit for each of a plurality of software instruction threads. Furthermore, the method can include detecting a defect in the execution of the test template by the circuit and modifying the circuit to prevent the defect during execution of the test template.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: April 25, 2017
    Assignee: International Business Machines Corporation
    Inventors: Wesam Ibraheem, Tom Kolan, Anatoly Koyfman, Ronny Morad, Vitali Sokhin, Elena Tsanko