Patents by Inventor Wesley Charles

Wesley Charles has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170354929
    Abstract: This invention uses multiple pairs of electrodes acting as electrical conductivity sensors that are secured at specific locations within spiral wound membrane elements and their interconnecting components of a reverse osmosis or nanofiltration pressure vessel. Each electrode pair might be attached to a wire cord to be inserted through and sealed against a vessel end cap into the permeate carrier tubes and interconnecting components of the membrane elements, or each electrode pair might be attached to a battery and a wireless transmitting device. Conductivity measurements from the sensors would be communicated to a microprocessor, which would evaluate each permeate conductivity measurement relative to other permeate conductivity measurements, as well as relative to derived or measured conductivities in the saline water in calculating a percent salt passage value specific to the location of each permeate sensor.
    Type: Application
    Filed: June 3, 2017
    Publication date: December 14, 2017
    Inventor: Wesley Charles Byrne
  • Publication number: 20170028357
    Abstract: This invention is connected to the influent or effluent stream of an SDI filter holder assembly that might otherwise be applied in the manual measurement of the flow rates and times as required to calculate a silt density index. The invention is based on its ability to provide data collection external to the filter holder assembly in digitally measuring the flow rate and water temperature proceeding to or from the filter assembly and in automatically incorporating those readings into a microprocessor for calculating the silt density index and in normalizing the index value for the effects of variation in initial filter permeability and water temperature, and in minimizing the effect of increasing cake solids on the SDI value as related to the decreasing flow of water-borne solids to the filter surface.
    Type: Application
    Filed: July 4, 2016
    Publication date: February 2, 2017
    Inventor: Wesley Charles Byrne
  • Publication number: 20160361593
    Abstract: The present invention generally relates to systems and methods for determining and analyzing sport related activities in conjunction with low latency transmission and processing. Specifically, embodiments of the present invention utilize sensor units placed on participants in a sporting activity in order to identify actions and/or movements made by the participants and analyze those actions and/or movements. In certain embodiments, the system is further configured to transmit the analyzed data associated with those actions and/or movements such that a group of end users (e.g., broadcast viewers, users of a mobile application) can consume the data in real time or near real time.
    Type: Application
    Filed: June 10, 2015
    Publication date: December 15, 2016
    Inventor: Wesley Charles Elliott
  • Publication number: 20070267319
    Abstract: A plastic bag pad comprising one or more plastic bags including detachable sections, wherein the bags are connected to a plastic header. A portion of each bag may be removed from the header by ripping along a perforated line. Each bag may comprise an overlay panel. Each bag may also include a sleeve to contain a support object. The detachable section of each bag may include an coupon or sample, and each bag may include an advertisement or name.
    Type: Application
    Filed: January 11, 2007
    Publication date: November 22, 2007
    Inventors: Wesley Charles Farley, Joseph N. Hall
  • Patent number: 6617085
    Abstract: A method of forming sublithography gate lengths involves the steps of patterning the layer of resist above the gate stack (including a gate layer, hardmask layer and etch-control layer) to a desired gate length and etching the etch-control layer and the hardmask layer; the portion of the circuit that has the correct gate length is covered with a blocking mask and the hardmask in the remainder is wet-etched to reduce its dimension, after which the gate stack is etched using both gate lengths of hardmask to produce different gate lengths in different areas.
    Type: Grant
    Filed: August 16, 2002
    Date of Patent: September 9, 2003
    Assignee: International Business Machines Corporation
    Inventors: Babar A. Kanh, Naim Moumen, Wesley Charles Natzle, Chienfan Yu
  • Publication number: 20020028555
    Abstract: Methods of fabricating metal oxide semiconductor field effect transistor (MOSFET) devices having a high dielectric constant (k greater than 7) gate insulator, low overlap capacitance (0.35 fF/&mgr;m or below) and a channel length (sub-lithographic, e.g., 0.1 &mgr;m or less) that is shorter than the lithography-defined gate lengths are provided. The methods include a damascene processing step and a chemical oxide removal (COR) step. The COR step produces a large taper on a pad oxide layer which, when combined with a high-k gate insulator, results in low overlap capacitance, sort channel lengths and better device performance as compared to MOSFET devices that are formed using conventional Complementary Metal Oxide Semiconductor (CMOS) technologies.
    Type: Application
    Filed: May 25, 2001
    Publication date: March 7, 2002
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Diane Catherine Boyd, Hussein Ibrahim Hanafi, Meikei Ieong, Wesley Charles Natzle
  • Patent number: 6353249
    Abstract: Methods of fabricating metal oxide semiconductor field effect transistor (MOSFET) devices having a high dielectric constant (k greater than 7) gate insulator, low overlap capacitance (0.35 fF/&mgr;m or below) and a channel length (sub-lithographic, e.g., 0.1 &mgr;m or less) that is shorter than the lithography-defined gate lengths are provided. The methods include a damascene processing step and a chemical oxide removal (COR) step. The COR step produces a large taper on a pad oxide layer which, when combined with a high-k gate insulator, results in low overlap capacitance, sort channel lengths and better device performance as compared to MOSFET devices that are formed using conventional Complementary Metal Oxide Semiconductor (CMOS) technologies.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: March 5, 2002
    Assignee: International Businsess Machines Corporation
    Inventors: Diane Catherine Boyd, Hussein Ibrahim Hanafi, Meikei Ieong, Wesley Charles Natzle
  • Patent number: 6271094
    Abstract: Methods of fabricating metal oxide semiconductor field effect transistor (MOSFET) devices having a high dielectric constant (k greater than 7) gate insulator, low overlap capacitance (0.35 fF/&mgr;m or below) and a channel length (sub-lithographic, e.g., 0.1 &mgr;m or less) that is shorter than the lithography-defined gate lengths are provided. The methods include a damascene processing step and a chemical oxide removal (COR) step. The COR step produces a large taper on a pad oxide layer which, when combined with a high-k gate insulator, results in low overlap capacitance, sort channel lengths and better device performance as compared to MOSFET devices that are formed using conventional Complementary Metal Oxide Semiconductor (CMOS) technologies.
    Type: Grant
    Filed: February 14, 2000
    Date of Patent: August 7, 2001
    Assignee: International Business Machines Corporation
    Inventors: Diane Catherine Boyd, Hussein Ibrahim Hanafi, Meikei Ieong, Wesley Charles Natzle
  • Patent number: 6245619
    Abstract: Techniques to fabricate sub−0.05 &mgr;m MOSFET devices with Super-Halo doping profile which provide excellent short-channel characteristics are provided. The techniques utilize a damascene-gate process to obtain MOSFET structures with oxide thickness above the source/drain region independent of the gate-oxide thickness and a disposable-spacer technique for the formation of the Super-Halo doping profile.
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: June 12, 2001
    Assignee: International Business Machines Corporation
    Inventors: Diane Catherine Boyd, Hussein Ibrahim Hanafi, Wesley Charles Natzle
  • Patent number: 6171971
    Abstract: A dielectric wiring structure and method of manufacture therefor. Successively formed wiring layers synergistically combine with subsequently formed sidewall supports spanning two or more layers to form a self supporting air dielectric interconnection matrix. Wires are supported by vertical nitride sidewalls which are, in turn, held in place and supported by the wires. After forming the complete wiring-sidewall structure, SiO2 between and under the wires is removed using gaseous HF at a partial pressure between 5 and 30 Torr. The metal wires may be clad with nitride for short and oxidation protection. Because sidewalls are formed after wiring, with the wiring at each level providing support definition, complex support alignment is unnecessary.
    Type: Grant
    Filed: July 30, 1999
    Date of Patent: January 9, 2001
    Assignee: International Business Machines Corporation
    Inventor: Wesley Charles Natzle
  • Patent number: 6097092
    Abstract: A dielectric wiring structure and method of manufacture therefor. Successively formed wiring layers synergistically combine with subsequently formed sidewall supports spanning two or more layers to form a self supporting air dielectric interconnection matrix. Wires are supported by vertical nitride sidewalls which are, in turn, held in place and supported by the wires. After forming the complete wiring-sidewall structure, SiO.sub.2 between and under the wires is removed using gaseous HF at a partial pressure between 5 and 30 Torr. The metal wires may be clad with nitride for short and oxidation protection. Because sidewalls are formed after wiring, with the wiring at each level providing support definition, complex support alignment is unnecessary.
    Type: Grant
    Filed: April 22, 1998
    Date of Patent: August 1, 2000
    Assignee: International Business Machines Corporation
    Inventor: Wesley Charles Natzle
  • Patent number: 5912807
    Abstract: Packaging (1) for cable assemblies (2), is constructed with cable assemblies (2) in a case (3), the cable assemblies (2) being routed along an interior of the case (3), a circuit board (4) positioned by the case (3) over the cable assemblies (2), and electrical connectors (5) on ends of selected cable assemblies (2) connect to the circuit board (4).
    Type: Grant
    Filed: August 5, 1997
    Date of Patent: June 15, 1999
    Assignees: The Whitaker Corporation, Illinois Tool Works Inc.
    Inventors: Robert Eugene Gallagher, Sr., Scott Alan Landis, Donald Arthur Cawthra, Wesley Charles Slagle, David William Gilmore
  • Patent number: 5792275
    Abstract: A film layer not susceptible to aerosol cleaning is removed from a surface by converting the film layer into a film susceptible to aerosol cleaning, and aerosol jet cleaning the converted film and any contaminants. The aerosol jet can be moved in relation to the surface to provide thorough cleaning.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: August 11, 1998
    Assignee: International Business Machines Corporation
    Inventors: Wesley Charles Natzle, Jin Jwang Wu, Chienfan Yu
  • Patent number: 4498449
    Abstract: An improved tensioning device is provided for use in an inner diameter saw blade housing. A tensioning ring, disposed in an annular clamping member, is internally threaded at plurality of locations along its circumference. An associated plurality of screws, disposed in cylindrical recesses in the clamping member, threadedly engage the internal threads. The screws may be turned through an opening in the clamping member having a diameter smaller than the screw to thereby precisely tension the blade as desired. Since the screws are captive within the clamping member, migration of the tensioning ring relative to the blade is prevented. Further, the screws do not protrude from the surface of the clamping member and the threaded portions of the screws are closed off from the ambient such that foreign matter cannot enter the clamping member and interfere with the tensioning process.
    Type: Grant
    Filed: April 5, 1982
    Date of Patent: February 12, 1985
    Assignee: Silicon Technology Corporation
    Inventors: George S. Kachajian, Robert E. Steere, Jr., Wesley Charles
  • Patent number: D661199
    Type: Grant
    Filed: February 23, 2010
    Date of Patent: June 5, 2012
    Inventor: Wesley Charles Bennett