Patents by Inventor Wesley Maxey

Wesley Maxey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • APPLICATION PROGRAMMING INTERFACE TO PERFORM OPERATION WITH REUSABLE THREAD
    Publication number: 20230305853
    Abstract: Apparatuses, systems, and techniques to perform collective operations using parallel processing. In at least one embodiment, a non-blocking application programming interface allow programs to improve performance of one or more collective operations on a GPU.
    Type: Application
    Filed: March 25, 2022
    Publication date: September 28, 2023
    Inventors: Piotr Ciolkosz, Kyrylo Perelygin, Harold Carter Edwards, Wesley Maxey
  • APPLICATION PROGRAMMING INTERFACE FOR SCAN OPERATIONS
    Publication number: 20230111125
    Abstract: Apparatuses, systems, and techniques to perform parallel processing. In at least one embodiment, a parallel processing algorithm for performing an additive prefix scan is selected from a plurality of alternatives based on an arrangement of a group of threads provided to perform the scan.
    Type: Application
    Filed: October 8, 2021
    Publication date: April 13, 2023
    Inventors: Piotr Ciolkosz, Kyrylo Perelygin, Harold Carter Edwards, Wesley Maxey
  • PARALLEL PROCESSING OF THREAD GROUPS
    Publication number: 20230086989
    Abstract: Apparatuses, systems, and techniques to facilitate parallel processing. In at least one embodiment, an application programming interface allows a user to define a plurality of cooperative thread groups, and launch multiple cooperative thread groups in parallel provided sufficient processing resources are available.
    Type: Application
    Filed: September 17, 2021
    Publication date: March 23, 2023
    Inventors: Piotr Ciolkosz, Kyrylo Perelygin, Harold Carter Edwards, Wesley Maxey
  • SYNCHRONIZATION BARRIER
    Publication number: 20220413945
    Abstract: Apparatuses, systems, and techniques to implement a barrier operation. In at least one embodiment, a memory barrier operation causes accesses to memory by a plurality of groups of threads to occur in an order indicated by the memory barrier operation.
    Type: Application
    Filed: July 2, 2021
    Publication date: December 29, 2022
    Inventors: Piotr Ciolkosz, Kyrylo Perelygin, Harold Carter Edwards, Wesley Maxey