Abstract: A transceiver includes a driver stage and a transient-triggered ring suppression circuit. The driver stage has a first transistor coupled between a supply voltage terminal and a first bus terminal and a second transistor coupled between a ground and a second bus terminal. The transient-triggered ring suppression circuit is coupled to the first and second transistors. The transient-triggered ring suppression circuit is configured to be enabled upon transition of the transceiver from a dominant state to a recessive state. Further, while the transceiver is in the recessive state, the transient-triggered ring suppression circuit is configured to attenuate ringing on at least one of the first or second bus terminals.

Abstract: A system basis chip (SBC) includes a serial peripheral interface for communication with a processor, a set of registers for storing information operable to control an external communication interface device, and a control signal output adapted to be coupled to the external communication interface device. In some implementations, the set of registers includes a first register for information indicative of a function of the control signal, and a second register for information indicative of a value of the control signal. The function of the control signal for the external communication interface device can be a supply voltage interrupt, a watchdog interrupt event, a counter-based watchdog interrupt event, a local wakeup request, a bus wakeup request, an entrance into a fail-safe mode of operation, or a general purpose output signal. In some implementations, the SBC also includes a supply voltage output adapted to be coupled to the external communication interface device.

Abstract: A transceiver includes a driver stage and a transient-triggered ring suppression circuit. The driver stage has a first transistor coupled between a supply voltage terminal and a first bus terminal and a second transistor coupled between a ground and a second bus terminal. The transient-triggered ring suppression circuit is coupled to the first and second transistors. The transient-triggered ring suppression circuit is configured to be enabled upon transition of the transceiver from a dominant state to a recessive state. Further, while the transceiver is in the recessive state, the transient-triggered ring suppression circuit is configured to attenuate ringing on at least one of the first or second bus terminals.

Abstract: A CAN bus transceiver includes CAN bus fault detection circuitry that can provide detailed information to simplify the task of the service technician when there is a CAN bus fault. Voltage and current measurements of the CAN bus are made and from them a fault type is determined. A time-domain reflectometer monitors the CAN bus signals for transmitted and reflected signals and from them a distance to the fault is determined. Either or both values are provided to a service technician to allow error determination and correction.

Abstract: A CAN bus transceiver includes CAN bus fault detection circuitry that can provide detailed information to simplify the task of the service technician when there is a CAN bus fault. Voltage and current measurements of the CAN bus are made and from them a fault type is determined. A time-domain reflectometer monitors the CAN bus signals for transmitted and reflected signals and from them a distance to the fault is determined. Either or both values are provided to a service technician to allow error determination and correction.