Patents by Inventor Wessam M. Hassanein

Wessam M. Hassanein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Optimization of instructions to reduce memory access violations
    Patent number: 9342284
    Abstract: Mechanisms for reducing memory access violations are disclosed. Sets of instructions may be identified and the identified sets of instructions may be re-translated or optimized to generate other sets of instructions. Execution of the other sets of instructions is analyzed to determine whether additional memory access violations occur. When additional memory access violations occur, further sets of instructions may be generated or re-translation/optimization of instructions may be disabled.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: May 17, 2016
    Assignee: Intel Corporation
    Inventors: Wessam M. Hassanein, Abhay S. Kanhere, Paul Caprioli
  • OPTIMIZATION OF INSTRUCTIONS TO REDUCE MEMORY ACCESS VIOLATIONS
    Publication number: 20150095625
    Abstract: Mechanisms for reducing memory access violations are disclosed. Sets of instructions may be identified and the identified sets of instructions may be re-translated or optimized to generate other sets of instructions. Execution of the other sets of instructions is analyzed to determine whether additional memory access violations occur. When additional memory access violations occur, further sets of instructions may be generated or re-translation/optimization of instructions may be disabled.
    Type: Application
    Filed: September 27, 2013
    Publication date: April 2, 2015
    Inventors: Wessam M. Hassanein, Abhay S. Kanhere, Paul Caprioli