Patents by Inventor Wi-Seob Kang

Wi-Seob Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7811921
    Abstract: A semiconductor device having a trench in the side portion of a conducting line pattern and methods of forming the same. The semiconductor device provides a way of preventing an electrical short between the conducting line pattern and a landing pad adjacent to the conducting line pattern. There are disposed two conducting line patterns on a semiconductor substrate. Each of the conducting line patterns includes a conducting line and a conducting line capping layer pattern stacked thereon. Each of the conducting line patterns has a trench between the conducting line capping layer pattern and the conducting line. Conducting line spacers are formed between the conducting line patterns. One conducting line spacer covers a portion of a sidewall of one of the conducting line patterns, and the remaining conducting line spacer covers an entire sidewall of the remaining conducting line pattern. A landing pad is disposed between the conducting line patterns.
    Type: Grant
    Filed: May 4, 2009
    Date of Patent: October 12, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Hyeon Nam, Seung-Kun Lee, Joong-Sup Choi, Chang-Moon Ahn, Wi-Seob Kang
  • Publication number: 20090215257
    Abstract: A semiconductor device having a trench in the side portion of a conducting line pattern and methods of forming the same. The semiconductor device provides a way of preventing an electrical short between the conducting line pattern and a landing pad adjacent to the conducting line pattern. There are disposed two conducting line patterns on a semiconductor substrate. Each of the conducting line patterns includes a conducting line and a conducting line capping layer pattern stacked thereon. Each of the conducting line patterns has a trench between the conducting line capping layer pattern and the conducting line. Conducting line spacers are formed between the conducting line patterns. One conducting line spacer covers a portion of a sidewall of one of the conducting line patterns, and the remaining conducting line spacer covers an entire sidewall of the remaining conducting line pattern. A landing pad is disposed between the conducting line patterns.
    Type: Application
    Filed: May 4, 2009
    Publication date: August 27, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chang-Hyeon Nam, Seung-Kun Lee, Joong-Sup Choi, Chang-Moon Ahn, Wi-Seob Kang
  • Patent number: 7545046
    Abstract: A semiconductor device having a trench in the side portion of a conducting line pattern and methods of forming the same. The semiconductor device provides a way of preventing an electrical short between the conducting line pattern and a landing pad adjacent to the conducting line pattern. There are disposed two conducting line patterns on a semiconductor substrate. Each of the conducting line patterns includes a conducting line and a conducting line capping layer pattern stacked thereon. Each of the conducting line patterns has a trench between the conducting line capping layer pattern and the conducting line. Conducting line spacers are formed between the conducting line patterns. One conducting line spacer covers a portion of a sidewall of one of the conducting line patterns, and the remaining conducting line spacer covers an entire sidewall of the remaining conducting line pattern. A landing pad is disposed between the conducting line patterns.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: June 9, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Hyeon Nam, Seung-Kun Lee, Joong-Sup Choi, Chang-Moon Ahn, Wi-Seob Kang
  • Publication number: 20060097390
    Abstract: A semiconductor device having a trench in the side portion of a conducting line pattern and methods of forming the same. The semiconductor device provides a way of preventing an electrical short between the conducting line pattern and a landing pad adjacent to the conducting line pattern. There are disposed two conducting line patterns on a semiconductor substrate. Each of the conducting line patterns includes a conducting line and a conducting line capping layer pattern stacked thereon. Each of the conducting line patterns has a trench between the conducting line capping layer pattern and the conducting line. Conducting line spacers are formed between the conducting line patterns. One conducting line spacer covers a portion of a sidewall of one of the conducting line patterns, and the remaining conducting line spacer covers an entire sidewall of the remaining conducting line pattern. A landing pad is disposed between the conducting line patterns.
    Type: Application
    Filed: November 3, 2005
    Publication date: May 11, 2006
    Inventors: Chang-Hyeon Nam, Seung-Kun Lee, Joong-Sup Choi, Chang-Moon Ahn, Wi-Seob Kang