Patents by Inventor Wichaya T. Changwatchai

Wichaya T. Changwatchai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Writing data to system memory in a data processing system in which cache line states are tracked
    Patent number: 8543766
    Abstract: A state indicator associated with a cache line is stored, wherein the cache line is one of a plurality of cache lines each associated with a corresponding unique section of a region of system memory. The state indicator comprises a dirty indication indicating that the cache line is a candidate for writing data stored in the cache line to the associated section of the region of system memory. The state indicator is one of a plurality of state indicators each associated with a corresponding cache line. For the region of system memory, a number of the plurality of state indicators that comprises the dirty indication is determined, and if a threshold is exceeded, data stored in a selected cache line is written to the associated section of the region of system memory, and a clean indication is stored in the state indicator corresponding to the cache line.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: September 24, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Brian C. Grayson, Wichaya T. Changwatchai
  • WRITING DATA TO SYSTEM MEMORY IN A DATA PROCESSING SYSTEM
    Publication number: 20120317367
    Abstract: A state indicator associated with a cache line is stored, wherein the cache line is one of a plurality of cache lines each associated with a corresponding unique section of a region of system memory. The state indicator comprises a dirty indication indicating that the cache line is a candidate for writing data stored in the cache line to the associated section of the region of system memory. The state indicator is one of a plurality of state indicators each associated with a corresponding cache line. For the region of system memory, a number of the plurality of state indicators that comprises the dirty indication is determined, and if a threshold is exceeded, data stored in a selected cache line is written to the associated section of the region of system memory, and a clean indication is stored in the state indicator corresponding to the cache line.
    Type: Application
    Filed: June 10, 2011
    Publication date: December 13, 2012
    Inventors: Brian C. Grayson, Wichaya T. Changwatchai