Abstract: An improved analog-to digital converter employs multiple sample and hold circuits to simultaneously supply multiple neural network A/D converters with samples of an analog input voltage so that the neural networks may simultaneously perform conversion of the different samples into a lower-order portion of the digital signals. A single fast A/D converter converts each sample into a higher-order portion of each digital signal.

Abstract: An analog-to-digital converter employs both flash and neural converters for converting an analog input voltage. The flash converter converts the higher-order bits in a single clock cycle. Values of the lower-order bits are determined by outputs from comparators with reference voltages provided by digital-to-analog converters. The D/A converters receive inputs from the flash converter as well as from those comparators which provide output results for higher-order bits. This interconnection of D/A converters and comparators thus forms a neural network for determining the value of the lower-order bits.

Abstract: An improved A/D converter is disclosed which employs variable voltage sources which provide reference levels for a plurality of voltage comparators. The outputs from the comparators feed forward into a latch. The higher-order outputs from the latch feed forward to the voltage sources for lower-order comparators. The reference levels of the lower-order comparators change based on the results from the higher-order outputs thus forming a neural network for performing the conversion. The latched outputs allow selection of a desired number of conversion steps or alternatively, the converter may be capable of determining when conversion is complete.