Abstract: A shingle circuit array and a method of assembling the shingle circuit is provided. The array has a shingle circuit with a substrate, an insulation film layer, a metal layer and TPV cells connected to the metal layer in series forming a shingle pattern with terraces. The substrate is of CTE matched material. The metal layer may be copper pads deposited on the terraces. The TPV cells are bonded to the copper pads and may be GaSb cells. Substrate materials include AlSiC or a Cu/Invar/Cu laminate sheet. The AlSiC material may be a microstructure having a continuous Al-metal phase with a discrete SiC particulate phase. The substrate may also be an enameled cast-iron substrate. The shingle circuit array may be provided in a TPV generator.

Abstract: A low inductive impedance dual in-line package for an integrated circuit die incorporates a lead frame formed with a central opening without a die attach paddle. A ground plate forms the die attach plane spaced from and parallel with the lead frame. A dielectric layer is formed between the lead frame and ground plate. The lead frame is formed with a ground lead finger electrically coupled in parallel with the ground plate thereby providing a ground path through the ground plate with planar configuration to minimize inductive impedance to ground current and to minimize cross coupling between the electrically active lead fingers of the lead frame. In the preferred embodiment, the lead frame and ground plate are initially supported in a spaced parallel plane relationship by complementary spacing tab elements. During encapsulation, the encapsulation molding compound is introduced between the lead frame and ground plate to form the dielectric layer.