Abstract: The invention relates to a method and to a circuit configuration for adjusting the voltage level for the electrical data transmission between a transmitting component and a receiving component of one or different assemblies. According to the invention, the voltage level is increased step-wise or continuously until the required value for the correct representation of the signals to be transmitted is reached in the receiving component. Increase of the voltage level is stopped by the transmission of respective information. The inventive method and circuit are advantageous in that the minimum voltage level required for the transmission of data can be precisely adjusted. Power loss can be thereby reduced and adjacent channel interferences through high voltage levels can be reduced to a minimum.

Abstract: The invention relates to a supply meter for liquid or gaseous mediums or electric current. The supply meter is provided with a display device for the medium that passes the supply meter. The entire previous supply is displayed by means of a cumulated meter reading. A verification code can be produced by said meter reading. The verification code display device is mechanically linked to the gear of the supply display device.

Abstract: An input circuit which in the course of a boundary scan test makes an interruption in one or both signal feeds clearly detectable is proposed for integrated circuits with differential data inputs.

Abstract: An improved CMOS termination is disclosed wherein a transmission gate provides the proper impedance for matching a termination with the characteristic impedance of the line.

Abstract: Switch elements having a relatively high forward resistance are provided in a broadband signal switching equipment comprising a crosspoint matrix constructed in FET technology and having input driver circuits and output amplifier circuits. The output amplifier circuits each include a cascade network of a CMOS inverter and a D flip-flop, and a switch having a relatively low forward resistance by which the line leading from the switch element to the inverter input is at least approximately reloaded to the potential corresponding to the switching threshold of the inverter. The switch element is reloaded in a preliminary phase of a bit switching time interval, in order, proceeding from that potential, to be reloaded in the following primary phase to the potential corresponding to the respective bit connected therethrough.

Abstract: Switches having a relatively high forward resistance are provided in a broadband signal switching equipment comprising a crosspoint matrix constructed in field effect transistor technology and provided with input drivers and output amplifiers. The output amplifiers respectively comprise an iterative network of a hysteresis-affected comparator and a D flip-flop, as well as a holding memory and a switch by way of which the holding memory is reloaded in a respective primary phase of a bit switching time interval. The reloading occurs at least approximately to the potential momentarily prevailing on the output line section leading away from the switch, this potential then continuing to be maintained at the second comparator input in the following switching phase.