Patents by Inventor Wilhelm MELITZ

Wilhelm MELITZ has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multi-dielectric gate stack for crystalline thin film transistors
    Patent number: 12009433
    Abstract: Embodiments disclosed herein include thin film transistors and methods of forming such thin film transistors. In an embodiment, the thin film transistor may comprise a substrate, a gate electrode over the substrate, and a gate dielectric stack over the gate electrode. In an embodiment, the gate dielectric stack may comprise a plurality of layers. In an embodiment, the plurality of layers may comprise an amorphous layer. In an embodiment, the thin film transistor may also comprise a semiconductor layer over the gate dielectric. In an embodiment, the semiconductor layer is a crystalline semiconductor layer. In an embodiment, the thin film transistor may also comprise a source electrode and a drain electrode.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: June 11, 2024
    Assignee: Intel Corporation
    Inventors: Van H. Le, Inanc Meric, Gilbert Dewey, Sean Ma, Abhishek A. Sharma, Miriam Reshotko, Shriram Shivaraman, Kent Millard, Matthew V. Metz, Wilhelm Melitz, Benjamin Chu-Kung, Jack Kavalieros
  • MULTI-DIELECTRIC GATE STACK FOR CRYSTALLINE THIN FILM TRANSISTORS
    Publication number: 20190378932
    Abstract: Embodiments disclosed herein include thin film transistors and methods of forming such thin film transistors. In an embodiment, the thin film transistor may comprise a substrate, a gate electrode over the substrate, and a gate dielectric stack over the gate electrode. In an embodiment, the gate dielectric stack may comprise a plurality of layers. In an embodiment, the plurality of layers may comprise an amorphous layer. In an embodiment, the thin film transistor may also comprise a semiconductor layer over the gate dielectric. In an embodiment, the semiconductor layer is a crystalline semiconductor layer. In an embodiment, the thin film transistor may also comprise a source electrode and a drain electrode.
    Type: Application
    Filed: June 6, 2018
    Publication date: December 12, 2019
    Inventors: Van H. LE, Inanc MERIC, Gilbert DEWEY, Sean MA, Abhishek A. SHARMA, Miriam RESHOTKO, Shriram SHIVARAMAN, Kent MILLARD, Matthew V. METZ, Wilhelm MELITZ, Benjamin CHU-KUNG, Jack KAVALIEROS