Abstract: A low profile semiconductor device (24) is manufactured by mounting a semiconductor die (26) onto a substrate (28) using an interposer (30). The interposer couples an active surface (32) of the die (26) to conductive traces (33) on the top surface of the substrate. The interposer is directionally conductive so that electrical conductivity is limited to the z-direction through thickness of the interposer. The interposer both affixes the die to the substrate and provides the first level of interconnects for the device. The inactive surface (36) of the die can be exposed for efficient thermal dissipation. An optional heat spreader (50) may be added for increased thermal management. The device may be overmolded, glob-topped, capped, or unencapsulated. Separate die-attach and wire bonding processes are eliminated. A second level of interconnects are provided by either solder balls (38), solder columns (44), or pins (64).

Abstract: A quad leadframe (30) for a semiconductor device is made from multiple dual-in-line leadframes (10). Two dual-in-line leadframes (10) are provided, wherein each leadframe has two opposing siderails (12) with a plurality of leads (14) connected to those siderails. The leads have a metal clad layer (16) on lead tips which are distal to the two siderails. Each leadframe also has another two opposing siderails (18) which are not connected to any leads. The two leadframes are stacked on top of one another, wherein one leadframe is rotated by substantially 90.degree. with respect to the other leadframe such that the leads of one leadframe are perpendicular to the leads of the second leadframe to form a quad configuration. The siderails enable alignment of the leadframes to each other. The two leadframes can then be optionally tack welded together at any location along the siderails.