Patents by Inventor Willem A. H. Engelse

Willem A. H. Engelse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6826195
    Abstract: A system and process for directly and flexibly switching connections of data packet flows between nodes of a broadband data processing system network. The system acts as a single IP switch.
    Type: Grant
    Filed: December 28, 1999
    Date of Patent: November 30, 2004
    Assignee: BigBand Networks BAS, Inc.
    Inventors: Paul E. Nikolich, Kumar Chinnaswamy, Paul H. Dormitzer, Willem A. H. Engelse, Walter G. Mahla, Howard Ngai, David R. Paolino, Kirk B. Pearce, Jyotirmoy B. Sarkar
  • Patent number: 5838904
    Abstract: A random number generating apparatus for an interface unit of a Carrier Sense with Multiple Access and Collision Detect (CSMA/CD) Ethernet data network. The interface unit includes a transmit backoff unit for implementing a backoff algorithm in response to a network collision signal and a random number. The apparatus comprises a dual mode random number generator and a multiplexer for switching the random number generator between modes in accordance with the serial address bits of a data packet being processed by the interface unit. The random number generator includes a 25 stage linear feedback shift register. The multiplexer has two signal inputs connected to outputs of the 18th and 22nd stages of the shift register respectively, a switch input connected to receive the serial address bits and an output connected in circuit to an input of the shift register.
    Type: Grant
    Filed: April 28, 1997
    Date of Patent: November 17, 1998
    Assignee: LSI Logic Corp.
    Inventors: Michael D. Rostoker, D. Tony Stelliga, Dave Paolino, Willem A. H. Engelse
  • Patent number: 5625825
    Abstract: A random number generating apparatus for an interface unit of a Carrier Sense with Multiple Access and Collision Detect (CSMA/CD) Ethernet data network. The interface unit includes a transmit backoff unit for implementing a backoff algorithm in response to a network collision signal and a random number. The apparatus comprises a dual mode random number generator and a multiplexer for switching the random number generator between modes in accordance with the serial address bits of a data packet being processed by the interface unit. The random number generator includes a 25 stage linear feedback shift register. The multiplexer has two signal inputs connected to outputs of the 18th and 22nd stages of the shift register respectively, a switch input connected to receive the serial address bits and an output connected in circuit to an input of the shift register.
    Type: Grant
    Filed: October 21, 1993
    Date of Patent: April 29, 1997
    Assignee: LSI Logic Corporation
    Inventors: Michael D. Rostoker, D. Tony Stelliga, Dave Paolino, Willem A. H. Engelse
  • Patent number: 5151895
    Abstract: A terminal server architecture includes a central processing unit (CPU), a data movement module, local area network (LAN) interface and a plurality of connected terminals. The CPU manages pointers to data using command status registers to instruct the data movement module to actually perform data movement between the terminals and the LAN.
    Type: Grant
    Filed: June 29, 1990
    Date of Patent: September 29, 1992
    Assignee: Digital Equipment Corporation
    Inventors: Gary Vacon, John A. Visser, Willem A. H. Engelse, Stephen D. Metzger
  • Patent number: 5047958
    Abstract: A graphics subsystem (10) employs an image memory (12) that includes an on-screen part (44) and an off-screen part (46). The locations of the on-screen memory (44) are continually scanned to provide data to be displayed on a display device (16). The off-screen part (46) stores data that represent image segments that have been occluded by windowing. To transfer data between the on-screen part (44) and the off-screen part (46), an address generator (24) generates a sequence of two-dimensional addresses representing the two-dimensional positions of the pixels whose data are to be transferred. These addresses are converted to one-dimensional addresses by a simple circuit consisting of multiplexers (26 and 28), adders (30 and 32) and a multiplier (34).
    Type: Grant
    Filed: June 15, 1989
    Date of Patent: September 10, 1991
    Assignee: Digital Equipment Corporation
    Inventors: Todd R. Comins, Willem A. H. Engelse