Abstract: A method for fabricating a resistive load element for a semiconductor device can be used with standard semiconductor processes. A layer of second level poly is deposited and lightly doped P-type. A resist mask is used to dope selected regions of the poly layer N-type. The poly layer is then patterned to define conductors and resistive load elements. The resistive load elements are formed by back-to-back PN diodes formed at the interfaces between the P-type and N-type regions.

Abstract: A method for fabricating a resistive load element for a semiconductor device can be used with standard semiconductor processes. A layer of second level poly is deposited and lightly doped P-type. A resist mask is used to dope selected regions of the poly layer N-type. The poly layer is then patterned to define conductors and resistive load elements. The resistive load elements are formed by back-to-back PN diodes formed at the interfaces between the P-type and N-type regions.

Abstract: An ESD protection circuit and structure for implementation within an integrated circuit is disclosed. The protection circuit includes a diode, serving as a triggering device, and a lateral bipolar transistor. The triggering voltage of said diode is selected by an implant underlying a first field oxide structure adjacent a first diffused region to which the external terminal is connected. The lateral bipolar transistor uses the first diffused region to which the external terminal is connected as the collector region, a second diffused region opposite the first field oxide structure from said first diffused region as the emitter, and the substrate, or epitaxial layer, as the base. A second field oxide structure encircles the emitter region and has a distance thereacross which is selected in order to provide sufficient base resistance that, upon junction breakdown of the diode, the base-emitter junction of the lateral transistor is forward biased and the transistor turned on.

Abstract: A method for fabricating a resistive load element for a semiconductor device can be used with standard semiconductor processes. A layer of second level poly is deposited and lightly doped P-type. A resist mask is used to dope selected regions of the poly layer N-type. The poly layer is then patterned to define conductors and resistive load elements. The resistive load elements are formed by back-to-back PN diodes formed at the interfaces between the P-type and N-type regions.

Abstract: A system gathers and displays information concerning status of a communications network without overloading the communications channels in the network. The monitoring system includes a monitor node, including an operator input interface. The monitor node is coupled to a first switching node in the distributed switching nodes of the network. The monitor node includes a first application maintaining topology data indicating the topology of the network and supporting a first protocol for updating the data with the first switching node. In addition, the monitor node includes a second application maintaining a list of alarm conditions entered in the node event logs in the network, and supporting a second protocol for updating the list with the plurality of distributed switching nodes. A third application runs in the monitor node for maintaining a monitor database indicating the configuration of the switching nodes as it is entered in the node configuration databases in the network.