Abstract: An apparatus includes a vapor cell having multiple cavities fluidly connected by one or more channels. At least one of the cavities is configured to receive a first material able to dissociate into one or more gases that are contained within the vapor cell. At least one of the cavities is configured to receive a second material able to absorb at least a portion of the one or more gases. The vapor cell could include a first cavity configured to receive the first material and a second cavity fluidly connected to the first cavity by at least one first channel, where the second cavity is configured to receive the gas(es). The vapor cell could also include a third cavity fluidly connected to at least one of the first and second cavities by at least one second channel, where the third cavity is configured to receive the second material.

Abstract: An optical projection tomography system comprises a support arranged to support an object (63) and to rotate the object between a plurality of orientations, a first imaging system (64) arranged to image the object from a first direction to form a first image, and a second imaging system arranged to image the object from a second direction to form a second image, data acquisition means (66, 67) arranged to acquire image data from the first and second images for each of the orientations and processing means arranged to process the image data to generate an image data set.

Abstract: A DMOS transistor with a lower on-state drain-to-source resistance and a higher breakdown voltage utilizes a slanted super junction drift structure that lies along the side wall of an opening with the drain region at the bottom of the opening and the source region near the top of the opening.

Abstract: The cost and size of an atomic magnetometer are reduced by attaching a vapor cell structure that has a vapor cell cavity to a base die that has a laser light source that outputs light to the vapor cell cavity, and attaching a photo detection die that has a photodiode to the vapor cell structure to detect light from the laser light source that passes through the vapor cell cavity.

Abstract: In a SOI process, a high lateral voltage isolation structure is formed by providing at least two concentric dielectric filled trenches, removing the semiconductor material between the dielectric filled trenches and filling the resultant gap with dielectric material to define a single wide dielectric filled trench.

Abstract: A cable routing system includes a longitudinally-expanding body positionable within an IT rack having a frame and two or more NEMA rails coupled to the frame. A pair of mounting brackets are positioned proximate each distal end of the longitudinal-expanding body and configured to directly engage the frame of the IT rack. A cable routing tray is longitudinally affixed to the longitudinally-expanding body and configured to rout cables longitudinally along at least a portion of the longitudinally-expanding body. One or more vertical radiused supports are configured to define a minimum vertical bend radius for cables routed through the cable routing tray.

Abstract: A semiconductor structure, which serves as the core of a semiconductor fabrication platform, has a combination of empty-well regions and filled-well regions variously used by electronic elements, particularly insulated-gate field-effect transistors (“IGFETs”), to achieve desired electronic characteristics. A relatively small amount of semiconductor well dopant is near the top of an empty well. A considerable amount of semiconductor well dopant is near the top of a filled well. Some IGFETs (100, 102, 112, 114, 124, and 126) utilize empty wells (180, 182, 192, 194, 204, and 206) in achieving desired transistor characteristics. Other IGFETs (108, 110, 116, 118, 120, and 122) utilize filled wells (188, 190, 196, 198, 200, and 202) in achieving desired transistor characteristics.

Abstract: A semiconductor capacitor with large area plates and a small footprint is formed on a semiconductor wafer by forming an opening in the wafer, depositing a first metal atoms through a first shadow mask that lies spaced apart from the wafer to form a first metal layer in the opening, a dielectric layer on the first metal layer, and a second metal atoms through a second shadow mask that lies spaced apart from the wafer to form a second metal layer on the dielectric layer.

Abstract: A method includes forming one or more capacitors over a substrate. The method also includes forming a transformer at least partially over the substrate. The transformer is adjacent to at least one of the one or more capacitors. At least a portion of the transformer is formed at a same level over the substrate as the one or more capacitors. The method further includes coupling the one or more capacitors and the transformer to at least one embedded integrated circuit die. The one or more capacitors, the transformer, and the at least one embedded integrated circuit die form at least part of a light emitting diode (LED) driver.

Abstract: Galvanic isolation between a high-voltage die and a low-voltage die in a multi-die chip is provided by a galvanic isolation die that physically supports the high-voltage die and the low-voltage die, and provides capacitive structures with high breakdown voltages that allow the high-voltage die to capacitively communicate with the low-voltage die.

Abstract: An endoscope includes a light source operable to generate coherent incident light, and a plurality of imaging optical fibers that are arranged in a fiber bundle, arranged to receive light at a proximal end of the fiber bundle, and arranged to transmit light to a distal end of the fiber bundle. The endoscope further includes a spatial light phase modulator between the light source and the fiber bundle, and arranged to receive the incident light from the light source and to adjust the relative phase of the incident light entering each of the plurality of imaging optical fibers.

Abstract: A method of simulating an integrated circuit device under test (DUT) is provided, wherein the DUT includes a plurality of terminals. For each terminal of the DUT, a probe pulse is applied to the terminal and a reaction is recorded at the terminal and each of the other terminals to obtain values representative of reactive tails for the terminal. For each terminal, the values representative of the reactive tails obtained for the terminal are stored as an entry of a look-up table. Each entry includes n+x fields, wherein n represents a number of arguments in the entry and x represents a number of functions in the entry. For each terminal, a signal value at a selected time step is calculated.

Abstract: A lateral DMOS transistor formed on a silicon-on-insulator (SOI) structure has a higher breakdown voltage that results from a cavity that is formed in the bulk region of the SOI structure. The cavity exposes a portion of the bottom surface of the insulator layer of the SOI structure that lies directly vertically below the drift region of the DMOS transistor.

Abstract: A laminated magnetic core, which has a number of magnetic layers and a number of insulation layers which are arranged so that an insulation layer lies between each vertically adjacent pair of magnetic layers, is formed in a method that forms the magnetic layers with an electroplating process, and the insulation layers with a sputter depositing process.

Abstract: A galvanic isolation integrated circuit system includes a semiconductor substrate; a layer of thermally conductive material, e.g., CVD nano- or poly-diamond thin film or boron nitride CVD thin film, formed over the semiconductor substrate; a first integrated circuit structure formed over the layer of thermally conductive material; a second integrated circuit structure formed over the layer of thermally conductive material, the second integrated circuit structure being spaced apart from the first integrated circuit structure; and a galvanic isolation structure formed over the layer of thermally conductive material between the first and second integrated circuit structures and connected to the first integrated circuit structure and the second integrated circuit structure.

Abstract: A micro-fabricated atomic clock structure is thermally insulated so that the atomic clock structure can operate with very little power in an environment where the external temperature can drop to ?40° C., while at the same time maintaining the temperature required for the proper operation of the VCSEL and the gas within the vapor cell.

Abstract: Magnetic laminations are formed in the openings of a first non-conductive structure, which is formed in the opening of a second non-conductive structure that has a maximum aspect ratio that is less than the maximum aspect ratio of the first non-conductive structure. The second non-conductive structure is more crack resistant than the first non-conductive structure, and thereby protects the first non-conductive structure and the magnetic laminations from environmental contaminants.

Abstract: The spikes in current and voltage that result from the failure of a galvanic dielectric layer are safely contained by a galvanic isolation fuse that pops and forms and open circuit between a high-voltage die and a low-voltage die in response to the failure of the galvanic dielectric layer.

Abstract: Magnetic laminations are formed in the openings of a first non-conductive structure, which is formed in the opening of a second non-conductive structure that has a maximum aspect ratio that is less than the maximum aspect ratio of the first non-conductive structure. The second non-conductive structure is more crack resistant than the first non-conductive structure, and thereby protects the first non-conductive structure and the magnetic laminations from environmental contaminants.

Abstract: The cost and size of an atomic magnetometer are reduced by attaching a vapor cell structure that has a vapor cell cavity to a base die that has a laser light source that outputs light to the vapor cell cavity, and attaching a photo detection die that has a photodiode to the vapor cell structure to detect light from the laser light source that passes through the vapor cell cavity.