Abstract: A system for generating transactions on a bus includes at least one instruction memory storing predefined bus stimuli instructions and at least one phase generator coupled between the bus and the instruction memory for providing signals to the bus in response to the instruction memory.

Abstract: An apparatus including a protocol watcher adapted for use with a bus, a state machine adapted to detect known bug signatures on the bus, and a perturber adapted to intervene on the bus to prevent occurrence of bugs having those signatures. A system utilizing such includes a bus, a first agent coupled to the bus, a second agent coupled to the bus for communicating to the first agent according to a bus protocol, and the bus patcher coupled to the bus for monitoring a communication from the second agent to the first agent to identify an event which would cause an error in the apparatus, and for modifying the communication such that the event is avoided. Any of the protocol watcher, state machine, and/or perturber may be programmable.

Abstract: An apparatus including a protocol watcher adapted for use with a bus, a state machine adapted to detect known bug signatures on the bus, and a perturber adapted to intervene on the bus to prevent occurrence of bugs having those signatures. A system utilizing such includes a bus, a first agent coupled to the bus, a second agent coupled to the bus for communicating to the first agent according to a bus protocol, and the bus patcher coupled to the bus for monitoring a communication from the second agent to the first agent to identify an event which would cause an error in the apparatus, and for modifying the communication such that the event is avoided. Any of the protocol watcher, state machine, and/or perturber may be programmable.

Abstract: A pair of In-Circuit-Emulator modules are embedded within a microprocessor to implement parts of an In-Circuit-Emulator system. A first In-Circuit-Emulator module, the In-Circuit-Emulator memory mapping module, maps specified physical addresses into a debug memory. The physical addresses mapped into the debug memory are set by programmable registers. The second In-Circuit-Emulator module, the In-Circuit-Emulator breakpoint module, allows the user to set conditions that cause the processor to recognize specific bus events. The In-Circuit-Emulator breakpoint module monitors an internal bus and an internal bus controller. The user can set specific bus event conditions by writing to a set of breakpoint registers in the breakpoint module.