Abstract: An apparatus is provided which comprises: a first set of one or more contacts on a first die surface, the first set of one or more contacts to couple with contacts of an integrated circuit die, one or more multi-level voltage clamps coupled with the first set of one or more contacts, the one or more multi-level voltage clamps switchable between two or more voltages, one or more integrated voltage regulators coupled with the one or more multi-level voltage clamps, the one or more integrated voltage regulators to provide an output voltage, one or more through silicon vias (TSVs) coupled with the one or more integrated voltage regulators, and a second set of one or more contacts on a second die surface, opposite the first die surface, the second set of one or more contacts coupled with the one or more TSVs, and the second set of one or more contacts to couple with contacts of a package substrate. Other embodiments are also disclosed and claimed.

Abstract: In a first aspect, the present description relates to a system for non-invasively characterizing a heterogeneous medium using ultrasound, comprising at least one first array (10) of transducers configured to generate a series of incident ultrasound waves in a region of said heterogeneous medium and record the ultrasound waves which are backscattered by said region as a function of time, as well as a computing unit (42) which is coupled to said at least one first array of transducers and configured to: record an experimental reflection matrix defined between an emission basis at the input and the basis of the transducers at the output; determine, from said experimental reflection matrix, at least one first wideband reflection matrix defined in a focused base at the input and output; determine a first distortion matrix defined between said focused basis and an observation basis, said first distortion matrix resulting, directly or after a change of basis, from the term-by-term matrix product of said first wideba

Abstract: Embodiments include a microelectronic device package structure having an inductor at least partially embedded within a substrate. At least one thermal solution structure may be on a surface of the inductor, and may be thermally coupled with the inductor. The one or more thermal solution structures provide a thermal pathway for cooling for the inductor, and extend a thermal time constant of the inductor.

Abstract: Disclosed herein are mono- and di-substituted tetrazines and methods of their preparation and converting an oxetanyl ester to a thio-substituted tetrazine, which is then converted to a mono-substituted tetrazine, a di-substituted tetrazine, or a vinylether disubstituted tetrazine.

Abstract: Method for ultrasonic characterization of a medium, comprising generating a series of incident ultrasonic waves, generating an experimental reflection matrix Rui(t) defined between the emission basis (i) as input and a reception basis (u) as output, and determining a focused reflection matrix RFoc(rin, rout, ?t) of the medium between an input virtual transducer (TVin) calculated based on a focusing as input to the experimental reflection matrix and an output virtual transducer (TVout) calculated based on a focusing as output from the experimental reflection matrix, the responses of the output virtual transducer (TVout) being obtained at a time instant that is shifted by an additional delay ?t relative to a time instant of the responses of the input virtual transducer (TVin).

Abstract: Method for ultrasonic characterization of a medium, comprising generating a series of incident ultrasonic waves, generating an experimental reflection matrix Rui(t) defined between the emission basis (i) as input and a reception basis (u) as output, determining a focused reflection matrix RFoc(rin, rout, ?t) of the medium between an input virtual transducer (TVin) calculated based on a focusing as input to the experimental reflection matrix and an output virtual transducer (TVout) calculated based on a focusing as output from the experimental reflection matrix, the responses of the output virtual transducer (TVout) being obtained at a time instant that is shifted by an additional delay ?t relative to a time instant of the responses of the input virtual transducer (TVin).

Abstract: Method for ultrasonic characterization of a medium, comprising generating a series of incident ultrasonic waves, generating an experimental reflection matrix Rui(t) defined between the emission basis (i) as input and a reception basis (u) as output, and determining a focused reflection matrix RFoc(rin, rout, ?t) of the medium between an input virtual transducer (TVin) calculated based on a focusing as input to the experimental reflection matrix and an output virtual transducer (TVout) calculated based on a focusing as output from the experimental reflection matrix, the responses of the output virtual transducer (TVout) being obtained at a time instant that is shifted by an additional delay ?t relative to a time instant of the responses of the input virtual transducer (TVin).

Abstract: Method for ultrasonic characterization of a medium, including generating a series of incident ultrasonic waves, generating an experimental reflection matrix Rui(t) defined between the emission basis (i) as input and a reception basis (u) as output, and determining a focused reflection matrix RFoc(rin, rout, ?t) of the medium between an input virtual transducer (TVin) calculated based on a focusing as input to the experimental reflection matrix and an output virtual transducer (TVout) calculated based on a focusing as output from the experimental reflection matrix, the responses of the output virtual transducer (TVout) being obtained at a time instant that is shifted by an additional delay Ot relative to a time instant of the responses of the input virtual transducer (TVin).

Abstract: A method for reducing an engine core speed is disclosed, which includes determining a condition of an engine during operation of the engine, and controlling an engine turbine clearance based on the condition of the engine so as to influence the engine core speed. An engine system comprising an engine core speed reducing system is also disclosed.

Abstract: A method for reducing an engine core speed is disclosed, which includes determining a condition of an engine during operation of the engine, and controlling an engine turbine clearance based on the condition of the engine so as to influence the engine core speed. An engine system comprising an engine core speed reducing system is also disclosed.

Abstract: In a first aspect, the present description relates to a system for non-invasively characterizing a heterogeneous medium using ultrasound, comprising at least one first array (10) of transducers configured to generate a series of incident ultrasound waves in a region of said heterogeneous medium and record the ultrasound waves which are backscattered by said region as a function of time, as well as a computing unit (42) which is coupled to said at least one first array of transducers and configured to: record an experimental reflection matrix defined between an emission basis at the input and the basis of the transducers at the output; determine, from said experimental reflection matrix, at least one first wideband reflection matrix defined in a focused base at the input and output; determine a first distortion matrix defined between said focused basis and an observation basis, said first distortion matrix resulting, directly or after a change of basis, from the term-by-term matrix product of said first wideba

Abstract: Techniques and mechanisms for mitigating damage to voltage regulator (VR) circuitry of a packaged device. In an embodiment, the VR circuitry comprises a circuit leg between a first node and a second node. During a burn-in process, the VR circuitry provides a regulated output voltage to a load circuit via the first node, wherein the output voltage is based on a supply voltage received via the second node. While the VR circuitry provides the regulated output voltage to the load circuit, a supply current is provided to the load circuit via a path which is independent of any leg which is between the first node and the second node. In another embodiment, an integrated circuit (IC) chip of the packaged device comprises the load circuit, and the leg further comprises an off-chip coil structure which is distinct from the IC chip.

Abstract: An integrated circuit assembly may be fabricated having an electronic substrate, an integrated circuit device having a first surface, an opposing second surface, at least one side extending between the first surface and the second surface, and at least one through-substrate via extending into the integrated circuit device from the second surface, wherein the first surface of the integrated circuit device is electrically attached to the electronic substrate; and at least one power delivery route electrically attached to the second surface of the integrated circuit device and to the electronic substrate, wherein the at least one power delivery route is conformal to the side of the integrated circuit device and the first surface of the electronic substrate.

Abstract: Method for registering a user in a medical software application A method for registering a user (U) in a medical software application (24) comprises: providing a registration code (6) to a user (U), the registration code (6) containing information (60) relating to a license key and information (61, 62) relating to at least one user credential associated with the user (U); entering, by the user (U), the registration code (6) and at least one user credential associated with the user (U) into the software application (24); processing, by the software application (24), the registration code (6) and the at least one user credential entered by the user (U); and creating a user account (240) for the user (U) in the software application (24) based on the information (61, 62) relating to the at least one user credential associated with the user (U) contained in the registration code (6).

Abstract: The present invention relates to a method for the non-invasive optical characterization of a heterogeneous medium, comprising: a step of illuminating, by means of a series of incident light waves, a given field of view of the heterogeneous medium, positioned in a focal plane of a microscope objective (30); a step of determining a first distortion matrix (Dur, Drr) in an observation basis defined between a conjugate plane of the focal plane (FP) and an observation plane, said first distortion matrix corresponding, in a correction basis defined between a conjugate plane of the focal plane and an aberration correction plane, to the term-by-term matrix product of a first reflection matrix (Rur) of the field of view, determined in the correction basis, with the phase conjugate matrix of a reference reflection matrix, defined for a model medium, in said correction basis; and a step of determining, from the first distortion matrix, at least one mapping of a physical parameter of the heterogeneous medium.

Abstract: An apparatus is provided which comprises: a plurality of plated through holes; a material with magnetic properties adjacent to the plurality of plated through holes; and one or more conductors orthogonal to a length of the plurality of plated through holes, the one or more conductors to couple one plated through hole of the plurality with another plated through hole of the plurality such that an inductor is formed.

Abstract: A wide bandwidth signal connector plug, comprising a plurality of signal pins having a first anchor portion and a first mating portion, and a plurality of ground pins having a second anchor portion and a second mating portion. The plurality of ground pins is adjacent to the plurality of signal pins. The plurality of signal pins has a first thickness and the plurality of ground pins has a second thickness that is greater than the first thickness. The first anchor portion has a first width and the second anchor portion has a second width that is greater than the first width.

Abstract: An apparatus is provided which comprises: a first set of one or more contacts on a first die surface, the first set of one or more contacts to couple with contacts of an integrated circuit die, one or more multi-level voltage clamps coupled with the first set of one or more contacts, the one or more multi-level voltage clamps switchable between two or more voltages, one or more integrated voltage regulators coupled with the one or more multi-level voltage clamps, the one or more integrated voltage regulators to provide an output voltage, one or more through silicon vias (TSVs) coupled with the one or more integrated voltage regulators, and a second set of one or more contacts on a second die surface, opposite the first die surface, the second set of one or more contacts coupled with the one or more TSVs, and the second set of one or more contacts to couple with contacts of a package substrate. Other embodiments are also disclosed and claimed.

Abstract: Embodiments include a microelectronic device package structure having an inductor at least partially embedded within a substrate. At least one thermal solution structure may be on a surface of the inductor, and may be thermally coupled with the inductor. The one or more thermal solution structures provide a thermal pathway for cooling for the inductor, and extend a thermal time constant of the inductor.

Abstract: Techniques and mechanisms for mitigating damage to voltage regulator (VR) circuitry of a packaged device. In an embodiment, the VR circuitry comprises a circuit leg between a first node and a second node. During a burn-in process, the VR circuitry provides a regulated output voltage to a load circuit via the first node, wherein the output voltage is based on a supply voltage received via the second node. While the VR circuitry provides the regulated output voltage to the load circuit, a supply current is provided to the load circuit via a path which is independent of any leg which is between the first node and the second node. In another embodiment, an integrated circuit (IC) chip of the packaged device comprises the load circuit, and the leg further comprises an off-chip coil structure which is distinct from the IC chip.