Abstract: A telecommunication network planning method, system, and computer readable medium support accessing point cloud data and a corresponding image of a location. The point cloud data indicates positions of physical objects visible in the image. A network planning function may be performed. The network planning function may include modifying an outside plant asset object visible in the image, obtaining a metric of an outside plant asset object visible in the image, and adding a virtual outside plant asset to a location. The point cloud data may be associated with the image within an interface that depicts the image to facilitate visualization of the outside plant assets in the surrounding environment.

Abstract: A telecommunication network planning method, system, and computer readable medium support accessing point cloud data and a corresponding image of a location. The point cloud data indicates positions of physical objects visible in the image. A network planning function may be performed. The network planning function may include modifying an outside plant asset object visible in the image, obtaining a metric of an outside plant asset object visible in the image, and adding a virtual outside plant asset to a location. The point cloud data may be associated with the image within an interface that depicts the image to facilitate visualization of the outside plant assets in the surrounding environment.

Abstract: Methods and apparatus for storing and retrieving annotations accessible by a plurality of reports are disclosed. When an annotation including comments entered by an author is received in association with a data element or field of one of the plurality of reports, the annotation is stored such that it is retrievable using a key. Specifically, the key is composed of both a scope of the annotation and a period end date of the annotation. The scope indicates a subject matter with which the annotation is associated. When annotations associated with a particular data element or field of a report are viewed, the scope of the annotation and the period end date of the data element or field are ascertained. A key composed of the scope and period end date is then used to retrieve the annotation(s) that are pertinent to the data element or field of the report.

Abstract: An apparatus, program product and method for managing access to a remote computing grid that is not normally accessible to a client. A client computer may communicate with the computing grid via a dropbox configured to receive and distribute data between the client computer and the grid. The connection may remain open while multiple commands are thus communicated to the computing grid, and the identity of the client submitting the commands may be authenticated.

Abstract: A programming tool for programmable logic devices (PLDs), such as field programmable gate arrays (FPGAs), supports the display of hidden-switch connections, in addition to the display of conventional placed-switch, switch-box, and pseudo-arc connections. A hidden-switch connection between two functional elements in the PLD is represented in graphical displays generated by the programming tool as a curve (e.g., a diagonal straight line) from a jumper wire on the first functional element to another jumper wire on the second functional element, where a jumper wire is represented in the graphical display as a wire connected at one end to an pin of the corresponding functional element and unconnected at the other end. A programming tool that supports hidden-switch connections can be used to program FPGAs and other PLDs having architectures that were not previously supported by conventional programming tools that do not support hidden-switch connections.

Abstract: A programming tool for programmable logic devices (PLDs), such as field programmable gate arrays (FPGAs), supports the display of hidden-switch connections, in addition to the display of conventional placed-switch, switch-box, and pseudo-arc connections. A hidden-switch connection between two functional elements in the PLD is represented in graphical displays generated by the programming tool as a curve (e.g., a diagonal straight line) from a jumper wire on the first functional element to another jumper wire on the second functional element, where a jumper wire is represented in the graphical display as a wire connected at one end to an pin of the corresponding functional element and unconnected at the other end. A programming tool that supports hidden-switch connections can be used to program FPGAs and other PLDs having architectures that were not previously supported by conventional programming tools that do not support hidden-switch connections.

Abstract: A programming tool for programmable logic devices (PLDs), such as field programmable gate arrays (FPGAs), supports the display of hidden-switch connections, in addition to the display of conventional placed-switch, switch-box, and pseudo-arc connections. A hidden-switch connection between two functional elements in the PLD is represented in graphical displays generated by the programming tool as a curve (e.g., a diagonal straight line) from a jumper wire on the first functional element to another jumper wire on the second functional element, where a jumper wire is represented in the graphical display as a wire connected at one end to an pin of the corresponding functional element and unconnected at the other end. A programming tool that supports hidden-switch connections can be used to program FPGAs and other PLDs having architectures that were not previously supported by conventional programming tools that do not support hidden-switch connections.

Abstract: A field programmable gate array (FPGA) includes at least one programmable function unit (PFU) which comprises input lines, output lines, and a look-up table (LUT) for generating various functions in response to a configuration bit stream. A first function is an adder/subtracter in which the first input line provides an add/subtract control signal to a multiplexer coupled to a full-adder. The multiplexer determines whether a data bit or its complement is coupled to the full-adder. A second function is an AND gate coupled to the full-adder in which the first input line provides a data bit to the AND gate. The second function provides a basic cell for a parallel multiplier. Furthermore, the first input line may be used as a control line or a data line for a general logic function, depending on the PFU function.

Abstract: Providing low-skew clock signals to a Field Programmable Gate Array (FPGA) chip normally requires devoting a certain number of bondpads to that purpose. However, that limits the number of clocks that may be applied, and may also limit which bondpads can be used for that purpose. In the present invention, any input/output bondpad may be used to supply a low-skew clock, or other global type signal, to one or more of the Programmable Function Units (PFUs). This is accomplished by using a criss-crossed grid of parallel conductor groups. Any of the conductors may be supplied by a clock from a bondpad or alternatively driven directly from a PFU, thereby allowing the distribution of internally-generated clocks. To facilitate programmable interconnects between the horizontal and vertical conductors, the outer conductor in a group crosses over the others at defined intervals, to thereby become the inner conductor.

Abstract: A field programmable gate array (FPGA) includes a distributed switch matrix for programmably connecting the various routing conductors. The distributed switch matrix comprises groups of additional conductors, referred to as "Switching R-nodes". The Switching R-nodes programmably connect selected ones of the (e.g, horizontal) routing conductors to other selected ones of the (e.g., vertical) routing conductors. In this manner, the direct connection between the routing conductors may be avoided, allowing for a reduced number of programmable interconnect devices. In one preferred embodiment, a nibble-mode architecture is used, wherein four data conductors are provided for each group of routing conductors, with other multiples-of-four data conductors also being advantageous.

Abstract: Providing low-skew clock signals to a Field Programmable Gate Array (FPGA) chip normally requires devoting a certain number of bondpads to that purpose. However, that limits the number of clocks that may be applied, and may also limit which bondpads can be used for that purpose. In the present invention, any input/output bondpad may be used to supply a low-skew clock, or other global type signal, to one or more of the Programmable Function Units (PFUs). This is accomplished by using a criss-crossed grid of parallel conductor groups. Any of the conductors may be supplied by a clock from a bondpad or alternatively driven directly from a PFU, thereby allowing the distribution of internally-generated clocks. To facilitate programmable interconnects between the horizontal and vertical conductors, the outer conductor in a group crosses over the others at defined intervals, to thereby become the inner conductor.

Abstract: A conferencing device and method among terminals in a distributed digital telephone switching system is provided. The telephone switching system has a plurality of switching elements for interconnecting telephone units and telephone lines via communication links. A duplex path is set between each party in the conference and a designated bridge port. The speech from all the parties in the conference is summed and at the bridge port the sum is sent back to all engaged in the conference. As each party receives the sum, it subtracts its own speech data and therefore obtains the speech data from the other parties in the conference.

Abstract: Microsphere wet cake is mixed with a surface barrier coating effective to prevent agglomeration and surface bonding of the microspheres, and removing water by drying with continuous mixing at high shear. In a subsequent step, by the control of the application of heat and balancing temperature and low shear mixing, it is possible to also control expansion of the microspheres.The surface barrier coating in the present invention is any one of a wide diversity of materials which meet the requirements of the intended function, i.e., to prevent the agglomeration of the microspheres during the process. Suitable materials include, by way of example, dry inorganic pigments or filler materials, and the like, and related organic materials.

Abstract: A field programmable gate array that includes a dedicated path that directly connects an I/O pad to a selected register in the array of programmable function units. For example, a direct connection (i.e., without a configurable interconnect point) is provided from an I/O pad, through an input driver, to the input of a selected register in a given PFU. Either this same path, or alternatively a different path, may be used to directly connect a register output from a given PFU to an I/O pad, through an output driver. This technique avoids the need for special I/O registers in the programmable input/output cells, thereby increasing the flexibility of use and ease of design of the FPGA.

Abstract: A communication switching system with distributed control processing is provided. The system includes a digital switching network having a modular array of intelligent digital switching elements each having processors and memory to set up communication paths for voice and data between the terminal module processors such as line cards and telephone units. Each addressable location in the system is assigned a logical address code (LAC). When a route is requested, a switch element processor interprets the destination LAC and selects a route through the switch toward the destination with each switch element in the communication path setting a route toward that destination. The switching network provides duplex paths for flexible communication. With such a duplex path speech is directed from a first terminal unit such as a telephone station and a second terminal unit such as a line card into a bridge port which sums the speech data from the two sources.

Abstract: The broadcast system of the switching network provides for the broadcast or multicast of interface switch status broadcasts and interface switch event broadcasts. An interface switch feature processor initiates a broadcast message made up of two bytes of data on a first channel, with particular command codes to identify the type of data contained within the broadcast message, paired with another two bytes of data in the same frame on a second channel. Broadcast messages are sent into the switching network in a non-broadcast manner until they reach the fold point of the switch network. From the fold point the broadcast messages are broadcast on every available broadcast channel directed out of the switch network towards the interface switches.

Abstract: Microsphere wet cake is mixed with a surface barrier coating effective to prevent agglomeration and surface bonding of the microspheres, and removing water by drying with continuous mixing at high shear. In a subsequent step, by the control of the application of heat and balancing temperature and low shear mixing, it is possible to also control expansion of the microspheres.The surface barrier coating in the present invention is any one of a wide diversity of materials which meet the requirements of the intended function, i.e., to prevent the agglomeration of the microspheres during the process. Suitable materials include, by way of example, dry inorganic pigments or filler materials, and the like, and related organic materials.

Abstract: Microsphere wet cake is mixed with a processing aid efective to prevent agglomeration and surface bonding of the microspheres, and thereafter removing water by drying with continuous mixing, optionally also under reduced pressure, i.e. vacuum drying. By the control of the application of heat and balancing temperature and the mixing, and optionally also the reduced pressure, it is possible to also control expansion of the microspheres from substantially none to substantially theoretical limits of expansion.The processing aid in the present invention is any one of a wide diversity of materials which meet the requirements of the intended function, i.e., to prevent the agglomeration of the microspheres during the process. Suitable materials include, by way of example, dry inorganic pigments or filler materials, and the like, and related organic materials.

Abstract: Microsphere wet cake is mixed with a processing aid effective to prevent agglomeration and surface bonding of the microspheres, and thereafter removing water by drying with continuous mixing, optionally also under reduced pressure, i.e. vacuum drying. By the control of the application of heat and balancing temperature and the mixing, and optionally also the reduced pressure, it is possible to also control expansion of the microspheres from substantially none to substantially theoretical limits of expansion.The processing aid in the present invention is any one of a wide diversity of materials which meet the requirements of the intended function, i.e. to prevent the agglomeration of the microspheres during the process. Suitable materials include, by way of example, dry inorganic pigments or filler materials, and the like, and related organic materials.

Abstract: Microsphere wet cake is mixed with a processing aid effective to prevent agglomeration and surface bonding of the microspheres, and thereafter removing water by drying with continuous mixing, optionally also under reduced pressure, i.e. vacuum drying. By the control of the application of heat and balancing temperature and the mixing, and optionally also the reduced pressure, it is possible to also control expansion of the microspheres from substantially none to substantially theoretical limits of expansion.The processing aid in the present invention is any one of a wide diversity of materials which meet the requirements of the intended function, i.e., to prevent the agglomeration of the microspheres during the process. Suitable materials include, by way of example, dry inorganic pigments or filler materials, and the like, and related organic materials.